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Searched refs:APBH_CH_NXTCMDAR_CMD_ADDR_MASK (Results 1 – 25 of 36) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h3417 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3419 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h3415 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3417 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h3415 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3417 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h3417 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3419 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h3417 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3419 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h3415 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3417 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
DMIMX8MN6_ca53.h3444 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3446 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h1597 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK 0xFFFFFFFFu macro
1599 … (((uint32_t)(((uint32_t)(x))<<APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT))&APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h3351 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3353 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h3351 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3353 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h3351 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3353 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
DMIMX8MM6_ca53.h3381 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3383 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h3351 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3353 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h3351 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3353 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4.h3351 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3353 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h3606 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3608 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h3606 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3608 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h3606 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3608 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h3589 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3591 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
DMIMX8ML8_cm7.h3606 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3608 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
DMIMX8ML8_ca53.h3633 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
3635 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/
DMIMX8QX2_cm4.h1995 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
1999 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/
DMIMX8QX1_cm4.h1995 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
1999 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX1/
DMIMX8DX1_cm4.h1995 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
1999 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/
DMIMX8DX2_cm4.h1995 #define APBH_CH_NXTCMDAR_CMD_ADDR_MASK (0xFFFFFFFFU) macro
1999 …(((uint32_t)(((uint32_t)(x)) << APBH_CH_NXTCMDAR_CMD_ADDR_SHIFT)) & APBH_CH_NXTCMDAR_CMD_ADDR_MASK)

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