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Searched refs:ANADIG_PMU (Results 1 – 25 of 55) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_anatop_ai.c33ANADIG_PMU->PMU_LDO_PLL ^= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
47ANADIG_PMU->PMU_LDO_PLL ^= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
311 ANADIG_PMU->PMU_REF_CTRL ^= ANADIG_PMU_PMU_REF_CTRL_REF_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
326 ANADIG_PMU->PMU_REF_CTRL ^= ANADIG_PMU_PMU_REF_CTRL_REF_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
Dfsl_clock.c228 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitArmPll()
306 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll2()
546 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll3()
748 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitAudioPll()
997 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitVideoPll()
1134 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll1()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_anatop_ai.c33ANADIG_PMU->PMU_LDO_PLL ^= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
47ANADIG_PMU->PMU_LDO_PLL ^= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
311 ANADIG_PMU->PMU_REF_CTRL ^= ANADIG_PMU_PMU_REF_CTRL_REF_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
326 ANADIG_PMU->PMU_REF_CTRL ^= ANADIG_PMU_PMU_REF_CTRL_REF_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
Dfsl_clock.c228 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitArmPll()
306 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll2()
547 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll3()
754 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitAudioPll()
988 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitVideoPll()
1125 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll1()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_anatop_ai.c33ANADIG_PMU->PMU_LDO_PLL ^= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
47ANADIG_PMU->PMU_LDO_PLL ^= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
311 ANADIG_PMU->PMU_REF_CTRL ^= ANADIG_PMU_PMU_REF_CTRL_REF_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
326 ANADIG_PMU->PMU_REF_CTRL ^= ANADIG_PMU_PMU_REF_CTRL_REF_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
Dfsl_clock.c228 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitArmPll()
306 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll2()
546 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll3()
748 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitAudioPll()
997 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitVideoPll()
1134 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll1()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_anatop_ai.c33ANADIG_PMU->PMU_LDO_PLL ^= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
47ANADIG_PMU->PMU_LDO_PLL ^= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
311 ANADIG_PMU->PMU_REF_CTRL ^= ANADIG_PMU_PMU_REF_CTRL_REF_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
326 ANADIG_PMU->PMU_REF_CTRL ^= ANADIG_PMU_PMU_REF_CTRL_REF_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
Dfsl_clock.c228 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitArmPll()
306 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll2()
547 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll3()
754 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitAudioPll()
988 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitVideoPll()
1125 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll1()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_anatop_ai.c33ANADIG_PMU->PMU_LDO_PLL ^= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
47ANADIG_PMU->PMU_LDO_PLL ^= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
311 ANADIG_PMU->PMU_REF_CTRL ^= ANADIG_PMU_PMU_REF_CTRL_REF_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
326 ANADIG_PMU->PMU_REF_CTRL ^= ANADIG_PMU_PMU_REF_CTRL_REF_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
Dfsl_clock.c228 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitArmPll()
306 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll2()
546 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll3()
748 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitAudioPll()
997 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitVideoPll()
1134 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll1()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_anatop_ai.c33ANADIG_PMU->PMU_LDO_PLL ^= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
47ANADIG_PMU->PMU_LDO_PLL ^= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
311 ANADIG_PMU->PMU_REF_CTRL ^= ANADIG_PMU_PMU_REF_CTRL_REF_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
326 ANADIG_PMU->PMU_REF_CTRL ^= ANADIG_PMU_PMU_REF_CTRL_REF_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
Dfsl_clock.c228 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitArmPll()
306 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll2()
546 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll3()
748 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitAudioPll()
997 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitVideoPll()
1134 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll1()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_anatop_ai.c33ANADIG_PMU->PMU_LDO_PLL ^= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
47ANADIG_PMU->PMU_LDO_PLL ^= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
311 ANADIG_PMU->PMU_REF_CTRL ^= ANADIG_PMU_PMU_REF_CTRL_REF_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
326 ANADIG_PMU->PMU_REF_CTRL ^= ANADIG_PMU_PMU_REF_CTRL_REF_AI_TOGGLE_MASK; /* toggle */ in ANATOP_AI_Access()
Dfsl_clock.c228 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitArmPll()
306 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll2()
546 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll3()
748 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitAudioPll()
997 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitVideoPll()
1134 PMU_StaticEnablePllLdo(ANADIG_PMU); in CLOCK_InitSysPll1()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1171/
Dfsl_pm_device.c994 PMU_SetPllLdoControlMode(ANADIG_PMU, kPMU_GPCMode); in PM_DEV_SetPowerSupplyControlBySetpoint()
1342 PMU_GPCEnableBandgap(ANADIG_PMU, PM_DEV_BANDGAP_EN_SETPOINT_MAP); in PM_DEV_PreparePowerSetting()
1343 PMU_GPCEnableBandgapStandbyMode(ANADIG_PMU, PM_DEV_BANDGAP_STANDBY_SETPOINT_MAP); in PM_DEV_PreparePowerSetting()
1344 PMU_SetBandgapControlMode(ANADIG_PMU, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1358 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_FBB_CM7, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1362 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_RBB_SOC, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1366 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_RBB_LPSR, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1172/
Dfsl_pm_device.c994 PMU_SetPllLdoControlMode(ANADIG_PMU, kPMU_GPCMode); in PM_DEV_SetPowerSupplyControlBySetpoint()
1342 PMU_GPCEnableBandgap(ANADIG_PMU, PM_DEV_BANDGAP_EN_SETPOINT_MAP); in PM_DEV_PreparePowerSetting()
1343 PMU_GPCEnableBandgapStandbyMode(ANADIG_PMU, PM_DEV_BANDGAP_STANDBY_SETPOINT_MAP); in PM_DEV_PreparePowerSetting()
1344 PMU_SetBandgapControlMode(ANADIG_PMU, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1358 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_FBB_CM7, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1362 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_RBB_SOC, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1366 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_RBB_LPSR, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1175/
Dfsl_pm_device.c994 PMU_SetPllLdoControlMode(ANADIG_PMU, kPMU_GPCMode); in PM_DEV_SetPowerSupplyControlBySetpoint()
1342 PMU_GPCEnableBandgap(ANADIG_PMU, PM_DEV_BANDGAP_EN_SETPOINT_MAP); in PM_DEV_PreparePowerSetting()
1343 PMU_GPCEnableBandgapStandbyMode(ANADIG_PMU, PM_DEV_BANDGAP_STANDBY_SETPOINT_MAP); in PM_DEV_PreparePowerSetting()
1344 PMU_SetBandgapControlMode(ANADIG_PMU, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1358 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_FBB_CM7, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1362 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_RBB_SOC, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1366 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_RBB_LPSR, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1176/
Dfsl_pm_device.c994 PMU_SetPllLdoControlMode(ANADIG_PMU, kPMU_GPCMode); in PM_DEV_SetPowerSupplyControlBySetpoint()
1342 PMU_GPCEnableBandgap(ANADIG_PMU, PM_DEV_BANDGAP_EN_SETPOINT_MAP); in PM_DEV_PreparePowerSetting()
1343 PMU_GPCEnableBandgapStandbyMode(ANADIG_PMU, PM_DEV_BANDGAP_STANDBY_SETPOINT_MAP); in PM_DEV_PreparePowerSetting()
1344 PMU_SetBandgapControlMode(ANADIG_PMU, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1358 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_FBB_CM7, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1362 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_RBB_SOC, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1366 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_RBB_LPSR, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1173/
Dfsl_pm_device.c994 PMU_SetPllLdoControlMode(ANADIG_PMU, kPMU_GPCMode); in PM_DEV_SetPowerSupplyControlBySetpoint()
1342 PMU_GPCEnableBandgap(ANADIG_PMU, PM_DEV_BANDGAP_EN_SETPOINT_MAP); in PM_DEV_PreparePowerSetting()
1343 PMU_GPCEnableBandgapStandbyMode(ANADIG_PMU, PM_DEV_BANDGAP_STANDBY_SETPOINT_MAP); in PM_DEV_PreparePowerSetting()
1344 PMU_SetBandgapControlMode(ANADIG_PMU, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1358 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_FBB_CM7, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1362 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_RBB_SOC, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
1366 PMU_SetBodyBiasControlMode(ANADIG_PMU, kPMU_RBB_LPSR, kPMU_GPCMode); in PM_DEV_PreparePowerSetting()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/drivers/
Dfsl_pmu.c19 #define PMU_POWER_DETECT_CTRL_REGISTER (ANADIG_PMU->PMU_POWER_DETECT_CTRL)
274 ANADIG_PMU->PMU_LDO_PLL |= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_STBY_EN_MASK; in PMU_EnableLdoStandbyMode()
278 ANADIG_PMU->PMU_LDO_PLL &= ~ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_STBY_EN_MASK; in PMU_EnableLdoStandbyMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/
Dfsl_pmu.c19 #define PMU_POWER_DETECT_CTRL_REGISTER (ANADIG_PMU->PMU_POWER_DETECT_CTRL)
274 ANADIG_PMU->PMU_LDO_PLL |= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_STBY_EN_MASK; in PMU_EnableLdoStandbyMode()
278 ANADIG_PMU->PMU_LDO_PLL &= ~ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_STBY_EN_MASK; in PMU_EnableLdoStandbyMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/
Dfsl_pmu.c19 #define PMU_POWER_DETECT_CTRL_REGISTER (ANADIG_PMU->PMU_POWER_DETECT_CTRL)
274 ANADIG_PMU->PMU_LDO_PLL |= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_STBY_EN_MASK; in PMU_EnableLdoStandbyMode()
278 ANADIG_PMU->PMU_LDO_PLL &= ~ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_STBY_EN_MASK; in PMU_EnableLdoStandbyMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/
Dfsl_pmu.c19 #define PMU_POWER_DETECT_CTRL_REGISTER (ANADIG_PMU->PMU_POWER_DETECT_CTRL)
274 ANADIG_PMU->PMU_LDO_PLL |= ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_STBY_EN_MASK; in PMU_EnableLdoStandbyMode()
278 ANADIG_PMU->PMU_LDO_PLL &= ~ANADIG_PMU_PMU_LDO_PLL_LDO_PLL_STBY_EN_MASK; in PMU_EnableLdoStandbyMode()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1170/
Dclock_config.c305 PMU_EnableBodyBias(ANADIG_PMU, kPMU_FBB_CM7, true); in BOARD_BootClockRUN()
309 PMU_EnableBodyBias(ANADIG_PMU, kPMU_FBB_CM7, false); in BOARD_BootClockRUN()
1120 PMU_EnableBodyBias(ANADIG_PMU, kPMU_FBB_CM7, true); in BOARD_BootClockRUN_800M()
1124 PMU_EnableBodyBias(ANADIG_PMU, kPMU_FBB_CM7, false); in BOARD_BootClockRUN_800M()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkbmimxrt1170/
Dclock_config.c305 PMU_EnableBodyBias(ANADIG_PMU, kPMU_FBB_CM7, true); in BOARD_BootClockRUN()
309 PMU_EnableBodyBias(ANADIG_PMU, kPMU_FBB_CM7, false); in BOARD_BootClockRUN()
1120 PMU_EnableBodyBias(ANADIG_PMU, kPMU_FBB_CM7, true); in BOARD_BootClockRUN_800M()
1124 PMU_EnableBodyBias(ANADIG_PMU, kPMU_FBB_CM7, false); in BOARD_BootClockRUN_800M()

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