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Searched refs:ANADIG_OSC (Results 1 – 25 of 49) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_clock.h2284 …ANADIG_OSC->OSC_48M_CTRL = (ANADIG_OSC->OSC_48M_CTRL & ~(ANADIG_OSC_OSC_48M_CTRL_RC_48M_CONTROL_MO… in CLOCK_OSC_SetOsc48MControlMode()
2299 ANADIG_OSC->OSC_48M_CTRL |= ANADIG_OSC_OSC_48M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOsc48M()
2303 ANADIG_OSC->OSC_48M_CTRL &= ~ANADIG_OSC_OSC_48M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOsc48M()
2314 …ANADIG_OSC->OSC_48M_CTRL = (ANADIG_OSC->OSC_48M_CTRL & ~(ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_CONTR… in CLOCK_OSC_SetOsc48MDiv2ControlMode()
2331 ANADIG_OSC->OSC_48M_CTRL |= ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_EN_MASK; in CLOCK_OSC_EnableOsc48MDiv2()
2335 ANADIG_OSC->OSC_48M_CTRL &= ~ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_EN_MASK; in CLOCK_OSC_EnableOsc48MDiv2()
2346 …ANADIG_OSC->OSC_24M_CTRL = (ANADIG_OSC->OSC_24M_CTRL & ~(ANADIG_OSC_OSC_24M_CTRL_OSC_24M_CONTROL_M… in CLOCK_OSC_SetOsc24MControlMode()
2369 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
2373 ANADIG_OSC->OSC_24M_CTRL &= ~ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
2392 …ANADIG_OSC->OSC_400M_CTRL1 = (ANADIG_OSC->OSC_400M_CTRL1 & (~ANADIG_OSC_OSC_400M_CTRL1_RC_400M_CON… in CLOCK_OSC_SetOscRc400MControlMode()
[all …]
Dfsl_clock.c1199 if (0UL == (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK)) in CLOCK_OSC_EnableOsc24M()
1201 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK; in CLOCK_OSC_EnableOsc24M()
1203 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in CLOCK_OSC_EnableOsc24M()
1219 tmp32 = ANADIG_OSC->OSC_24M_CTRL; in CLOCK_OSC_SetOsc24MWorkMode()
1223 ANADIG_OSC->OSC_24M_CTRL = tmp32; in CLOCK_OSC_SetOsc24MWorkMode()
1241 tmp32 = ANADIG_OSC->OSC_16M_CTRL; in CLOCK_OSC_SetOsc16MConfig()
1246 ANADIG_OSC->OSC_16M_CTRL = tmp32; in CLOCK_OSC_SetOsc16MConfig()
1712 ANADIG_OSC->OSC_400M_CTRL1 &= ~ANADIG_OSC_OSC_400M_CTRL1_PWD_MASK; in CLOCK_OSC_EnableOscRc400M()
1713 ANADIG_OSC->OSC_400M_CTRL2 |= ANADIG_OSC_OSC_400M_CTRL2_ENABLE_CLK_MASK; in CLOCK_OSC_EnableOscRc400M()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_clock.h2251 …ANADIG_OSC->OSC_48M_CTRL = (ANADIG_OSC->OSC_48M_CTRL & ~(ANADIG_OSC_OSC_48M_CTRL_RC_48M_CONTROL_MO… in CLOCK_OSC_SetOsc48MControlMode()
2266 ANADIG_OSC->OSC_48M_CTRL |= ANADIG_OSC_OSC_48M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOsc48M()
2270 ANADIG_OSC->OSC_48M_CTRL &= ~ANADIG_OSC_OSC_48M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOsc48M()
2281 …ANADIG_OSC->OSC_48M_CTRL = (ANADIG_OSC->OSC_48M_CTRL & ~(ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_CONTR… in CLOCK_OSC_SetOsc48MDiv2ControlMode()
2298 ANADIG_OSC->OSC_48M_CTRL |= ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_EN_MASK; in CLOCK_OSC_EnableOsc48MDiv2()
2302 ANADIG_OSC->OSC_48M_CTRL &= ~ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_EN_MASK; in CLOCK_OSC_EnableOsc48MDiv2()
2313 …ANADIG_OSC->OSC_24M_CTRL = (ANADIG_OSC->OSC_24M_CTRL & ~(ANADIG_OSC_OSC_24M_CTRL_OSC_24M_CONTROL_M… in CLOCK_OSC_SetOsc24MControlMode()
2336 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
2340 ANADIG_OSC->OSC_24M_CTRL &= ~ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
2359 …ANADIG_OSC->OSC_400M_CTRL1 = (ANADIG_OSC->OSC_400M_CTRL1 & (~ANADIG_OSC_OSC_400M_CTRL1_RC_400M_CON… in CLOCK_OSC_SetOscRc400MControlMode()
[all …]
Dfsl_clock.c1190 if (0UL == (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK)) in CLOCK_OSC_EnableOsc24M()
1192 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK; in CLOCK_OSC_EnableOsc24M()
1194 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in CLOCK_OSC_EnableOsc24M()
1210 tmp32 = ANADIG_OSC->OSC_24M_CTRL; in CLOCK_OSC_SetOsc24MWorkMode()
1214 ANADIG_OSC->OSC_24M_CTRL = tmp32; in CLOCK_OSC_SetOsc24MWorkMode()
1232 tmp32 = ANADIG_OSC->OSC_16M_CTRL; in CLOCK_OSC_SetOsc16MConfig()
1237 ANADIG_OSC->OSC_16M_CTRL = tmp32; in CLOCK_OSC_SetOsc16MConfig()
1699 ANADIG_OSC->OSC_400M_CTRL1 &= ~ANADIG_OSC_OSC_400M_CTRL1_PWD_MASK; in CLOCK_OSC_EnableOscRc400M()
1700 ANADIG_OSC->OSC_400M_CTRL2 |= ANADIG_OSC_OSC_400M_CTRL2_ENABLE_CLK_MASK; in CLOCK_OSC_EnableOscRc400M()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_clock.h2284 …ANADIG_OSC->OSC_48M_CTRL = (ANADIG_OSC->OSC_48M_CTRL & ~(ANADIG_OSC_OSC_48M_CTRL_RC_48M_CONTROL_MO… in CLOCK_OSC_SetOsc48MControlMode()
2299 ANADIG_OSC->OSC_48M_CTRL |= ANADIG_OSC_OSC_48M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOsc48M()
2303 ANADIG_OSC->OSC_48M_CTRL &= ~ANADIG_OSC_OSC_48M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOsc48M()
2314 …ANADIG_OSC->OSC_48M_CTRL = (ANADIG_OSC->OSC_48M_CTRL & ~(ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_CONTR… in CLOCK_OSC_SetOsc48MDiv2ControlMode()
2331 ANADIG_OSC->OSC_48M_CTRL |= ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_EN_MASK; in CLOCK_OSC_EnableOsc48MDiv2()
2335 ANADIG_OSC->OSC_48M_CTRL &= ~ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_EN_MASK; in CLOCK_OSC_EnableOsc48MDiv2()
2346 …ANADIG_OSC->OSC_24M_CTRL = (ANADIG_OSC->OSC_24M_CTRL & ~(ANADIG_OSC_OSC_24M_CTRL_OSC_24M_CONTROL_M… in CLOCK_OSC_SetOsc24MControlMode()
2369 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
2373 ANADIG_OSC->OSC_24M_CTRL &= ~ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
2392 …ANADIG_OSC->OSC_400M_CTRL1 = (ANADIG_OSC->OSC_400M_CTRL1 & (~ANADIG_OSC_OSC_400M_CTRL1_RC_400M_CON… in CLOCK_OSC_SetOscRc400MControlMode()
[all …]
Dfsl_clock.c1199 if (0UL == (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK)) in CLOCK_OSC_EnableOsc24M()
1201 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK; in CLOCK_OSC_EnableOsc24M()
1203 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in CLOCK_OSC_EnableOsc24M()
1219 tmp32 = ANADIG_OSC->OSC_24M_CTRL; in CLOCK_OSC_SetOsc24MWorkMode()
1223 ANADIG_OSC->OSC_24M_CTRL = tmp32; in CLOCK_OSC_SetOsc24MWorkMode()
1241 tmp32 = ANADIG_OSC->OSC_16M_CTRL; in CLOCK_OSC_SetOsc16MConfig()
1246 ANADIG_OSC->OSC_16M_CTRL = tmp32; in CLOCK_OSC_SetOsc16MConfig()
1712 ANADIG_OSC->OSC_400M_CTRL1 &= ~ANADIG_OSC_OSC_400M_CTRL1_PWD_MASK; in CLOCK_OSC_EnableOscRc400M()
1713 ANADIG_OSC->OSC_400M_CTRL2 |= ANADIG_OSC_OSC_400M_CTRL2_ENABLE_CLK_MASK; in CLOCK_OSC_EnableOscRc400M()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_clock.h2251 …ANADIG_OSC->OSC_48M_CTRL = (ANADIG_OSC->OSC_48M_CTRL & ~(ANADIG_OSC_OSC_48M_CTRL_RC_48M_CONTROL_MO… in CLOCK_OSC_SetOsc48MControlMode()
2266 ANADIG_OSC->OSC_48M_CTRL |= ANADIG_OSC_OSC_48M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOsc48M()
2270 ANADIG_OSC->OSC_48M_CTRL &= ~ANADIG_OSC_OSC_48M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOsc48M()
2281 …ANADIG_OSC->OSC_48M_CTRL = (ANADIG_OSC->OSC_48M_CTRL & ~(ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_CONTR… in CLOCK_OSC_SetOsc48MDiv2ControlMode()
2298 ANADIG_OSC->OSC_48M_CTRL |= ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_EN_MASK; in CLOCK_OSC_EnableOsc48MDiv2()
2302 ANADIG_OSC->OSC_48M_CTRL &= ~ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_EN_MASK; in CLOCK_OSC_EnableOsc48MDiv2()
2313 …ANADIG_OSC->OSC_24M_CTRL = (ANADIG_OSC->OSC_24M_CTRL & ~(ANADIG_OSC_OSC_24M_CTRL_OSC_24M_CONTROL_M… in CLOCK_OSC_SetOsc24MControlMode()
2336 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
2340 ANADIG_OSC->OSC_24M_CTRL &= ~ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
2359 …ANADIG_OSC->OSC_400M_CTRL1 = (ANADIG_OSC->OSC_400M_CTRL1 & (~ANADIG_OSC_OSC_400M_CTRL1_RC_400M_CON… in CLOCK_OSC_SetOscRc400MControlMode()
[all …]
Dfsl_clock.c1190 if (0UL == (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK)) in CLOCK_OSC_EnableOsc24M()
1192 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK; in CLOCK_OSC_EnableOsc24M()
1194 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in CLOCK_OSC_EnableOsc24M()
1210 tmp32 = ANADIG_OSC->OSC_24M_CTRL; in CLOCK_OSC_SetOsc24MWorkMode()
1214 ANADIG_OSC->OSC_24M_CTRL = tmp32; in CLOCK_OSC_SetOsc24MWorkMode()
1232 tmp32 = ANADIG_OSC->OSC_16M_CTRL; in CLOCK_OSC_SetOsc16MConfig()
1237 ANADIG_OSC->OSC_16M_CTRL = tmp32; in CLOCK_OSC_SetOsc16MConfig()
1699 ANADIG_OSC->OSC_400M_CTRL1 &= ~ANADIG_OSC_OSC_400M_CTRL1_PWD_MASK; in CLOCK_OSC_EnableOscRc400M()
1700 ANADIG_OSC->OSC_400M_CTRL2 |= ANADIG_OSC_OSC_400M_CTRL2_ENABLE_CLK_MASK; in CLOCK_OSC_EnableOscRc400M()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_clock.h2284 …ANADIG_OSC->OSC_48M_CTRL = (ANADIG_OSC->OSC_48M_CTRL & ~(ANADIG_OSC_OSC_48M_CTRL_RC_48M_CONTROL_MO… in CLOCK_OSC_SetOsc48MControlMode()
2299 ANADIG_OSC->OSC_48M_CTRL |= ANADIG_OSC_OSC_48M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOsc48M()
2303 ANADIG_OSC->OSC_48M_CTRL &= ~ANADIG_OSC_OSC_48M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOsc48M()
2314 …ANADIG_OSC->OSC_48M_CTRL = (ANADIG_OSC->OSC_48M_CTRL & ~(ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_CONTR… in CLOCK_OSC_SetOsc48MDiv2ControlMode()
2331 ANADIG_OSC->OSC_48M_CTRL |= ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_EN_MASK; in CLOCK_OSC_EnableOsc48MDiv2()
2335 ANADIG_OSC->OSC_48M_CTRL &= ~ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_EN_MASK; in CLOCK_OSC_EnableOsc48MDiv2()
2346 …ANADIG_OSC->OSC_24M_CTRL = (ANADIG_OSC->OSC_24M_CTRL & ~(ANADIG_OSC_OSC_24M_CTRL_OSC_24M_CONTROL_M… in CLOCK_OSC_SetOsc24MControlMode()
2369 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
2373 ANADIG_OSC->OSC_24M_CTRL &= ~ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
2392 …ANADIG_OSC->OSC_400M_CTRL1 = (ANADIG_OSC->OSC_400M_CTRL1 & (~ANADIG_OSC_OSC_400M_CTRL1_RC_400M_CON… in CLOCK_OSC_SetOscRc400MControlMode()
[all …]
Dfsl_clock.c1199 if (0UL == (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK)) in CLOCK_OSC_EnableOsc24M()
1201 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK; in CLOCK_OSC_EnableOsc24M()
1203 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in CLOCK_OSC_EnableOsc24M()
1219 tmp32 = ANADIG_OSC->OSC_24M_CTRL; in CLOCK_OSC_SetOsc24MWorkMode()
1223 ANADIG_OSC->OSC_24M_CTRL = tmp32; in CLOCK_OSC_SetOsc24MWorkMode()
1241 tmp32 = ANADIG_OSC->OSC_16M_CTRL; in CLOCK_OSC_SetOsc16MConfig()
1246 ANADIG_OSC->OSC_16M_CTRL = tmp32; in CLOCK_OSC_SetOsc16MConfig()
1712 ANADIG_OSC->OSC_400M_CTRL1 &= ~ANADIG_OSC_OSC_400M_CTRL1_PWD_MASK; in CLOCK_OSC_EnableOscRc400M()
1713 ANADIG_OSC->OSC_400M_CTRL2 |= ANADIG_OSC_OSC_400M_CTRL2_ENABLE_CLK_MASK; in CLOCK_OSC_EnableOscRc400M()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_clock.h2284 …ANADIG_OSC->OSC_48M_CTRL = (ANADIG_OSC->OSC_48M_CTRL & ~(ANADIG_OSC_OSC_48M_CTRL_RC_48M_CONTROL_MO… in CLOCK_OSC_SetOsc48MControlMode()
2299 ANADIG_OSC->OSC_48M_CTRL |= ANADIG_OSC_OSC_48M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOsc48M()
2303 ANADIG_OSC->OSC_48M_CTRL &= ~ANADIG_OSC_OSC_48M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOsc48M()
2314 …ANADIG_OSC->OSC_48M_CTRL = (ANADIG_OSC->OSC_48M_CTRL & ~(ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_CONTR… in CLOCK_OSC_SetOsc48MDiv2ControlMode()
2331 ANADIG_OSC->OSC_48M_CTRL |= ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_EN_MASK; in CLOCK_OSC_EnableOsc48MDiv2()
2335 ANADIG_OSC->OSC_48M_CTRL &= ~ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_EN_MASK; in CLOCK_OSC_EnableOsc48MDiv2()
2346 …ANADIG_OSC->OSC_24M_CTRL = (ANADIG_OSC->OSC_24M_CTRL & ~(ANADIG_OSC_OSC_24M_CTRL_OSC_24M_CONTROL_M… in CLOCK_OSC_SetOsc24MControlMode()
2369 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
2373 ANADIG_OSC->OSC_24M_CTRL &= ~ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
2392 …ANADIG_OSC->OSC_400M_CTRL1 = (ANADIG_OSC->OSC_400M_CTRL1 & (~ANADIG_OSC_OSC_400M_CTRL1_RC_400M_CON… in CLOCK_OSC_SetOscRc400MControlMode()
[all …]
Dfsl_clock.c1199 if (0UL == (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK)) in CLOCK_OSC_EnableOsc24M()
1201 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK; in CLOCK_OSC_EnableOsc24M()
1203 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in CLOCK_OSC_EnableOsc24M()
1219 tmp32 = ANADIG_OSC->OSC_24M_CTRL; in CLOCK_OSC_SetOsc24MWorkMode()
1223 ANADIG_OSC->OSC_24M_CTRL = tmp32; in CLOCK_OSC_SetOsc24MWorkMode()
1241 tmp32 = ANADIG_OSC->OSC_16M_CTRL; in CLOCK_OSC_SetOsc16MConfig()
1246 ANADIG_OSC->OSC_16M_CTRL = tmp32; in CLOCK_OSC_SetOsc16MConfig()
1712 ANADIG_OSC->OSC_400M_CTRL1 &= ~ANADIG_OSC_OSC_400M_CTRL1_PWD_MASK; in CLOCK_OSC_EnableOscRc400M()
1713 ANADIG_OSC->OSC_400M_CTRL2 |= ANADIG_OSC_OSC_400M_CTRL2_ENABLE_CLK_MASK; in CLOCK_OSC_EnableOscRc400M()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_clock.h2284 …ANADIG_OSC->OSC_48M_CTRL = (ANADIG_OSC->OSC_48M_CTRL & ~(ANADIG_OSC_OSC_48M_CTRL_RC_48M_CONTROL_MO… in CLOCK_OSC_SetOsc48MControlMode()
2299 ANADIG_OSC->OSC_48M_CTRL |= ANADIG_OSC_OSC_48M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOsc48M()
2303 ANADIG_OSC->OSC_48M_CTRL &= ~ANADIG_OSC_OSC_48M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOsc48M()
2314 …ANADIG_OSC->OSC_48M_CTRL = (ANADIG_OSC->OSC_48M_CTRL & ~(ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_CONTR… in CLOCK_OSC_SetOsc48MDiv2ControlMode()
2331 ANADIG_OSC->OSC_48M_CTRL |= ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_EN_MASK; in CLOCK_OSC_EnableOsc48MDiv2()
2335 ANADIG_OSC->OSC_48M_CTRL &= ~ANADIG_OSC_OSC_48M_CTRL_RC_48M_DIV2_EN_MASK; in CLOCK_OSC_EnableOsc48MDiv2()
2346 …ANADIG_OSC->OSC_24M_CTRL = (ANADIG_OSC->OSC_24M_CTRL & ~(ANADIG_OSC_OSC_24M_CTRL_OSC_24M_CONTROL_M… in CLOCK_OSC_SetOsc24MControlMode()
2369 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
2373 ANADIG_OSC->OSC_24M_CTRL &= ~ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
2392 …ANADIG_OSC->OSC_400M_CTRL1 = (ANADIG_OSC->OSC_400M_CTRL1 & (~ANADIG_OSC_OSC_400M_CTRL1_RC_400M_CON… in CLOCK_OSC_SetOscRc400MControlMode()
[all …]
Dfsl_clock.c1199 if (0UL == (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK)) in CLOCK_OSC_EnableOsc24M()
1201 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK; in CLOCK_OSC_EnableOsc24M()
1203 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in CLOCK_OSC_EnableOsc24M()
1219 tmp32 = ANADIG_OSC->OSC_24M_CTRL; in CLOCK_OSC_SetOsc24MWorkMode()
1223 ANADIG_OSC->OSC_24M_CTRL = tmp32; in CLOCK_OSC_SetOsc24MWorkMode()
1241 tmp32 = ANADIG_OSC->OSC_16M_CTRL; in CLOCK_OSC_SetOsc16MConfig()
1246 ANADIG_OSC->OSC_16M_CTRL = tmp32; in CLOCK_OSC_SetOsc16MConfig()
1712 ANADIG_OSC->OSC_400M_CTRL1 &= ~ANADIG_OSC_OSC_400M_CTRL1_PWD_MASK; in CLOCK_OSC_EnableOscRc400M()
1713 ANADIG_OSC->OSC_400M_CTRL2 |= ANADIG_OSC_OSC_400M_CTRL2_ENABLE_CLK_MASK; in CLOCK_OSC_EnableOscRc400M()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/drivers/
Dfsl_clock.c1055 if (0UL == (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK)) in CLOCK_OSC_EnableOsc24M()
1057 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK; in CLOCK_OSC_EnableOsc24M()
1059 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in CLOCK_OSC_EnableOsc24M()
1075 tmp32 = ANADIG_OSC->OSC_24M_CTRL; in CLOCK_OSC_SetOsc24MWorkMode()
1079 ANADIG_OSC->OSC_24M_CTRL = tmp32; in CLOCK_OSC_SetOsc24MWorkMode()
1552 ANADIG_OSC->OSC_RC24M_CTRL = in CLOCK_SetClockSourceControlMode()
1553 … (ANADIG_OSC->OSC_RC24M_CTRL & ~(ANADIG_OSC_OSC_RC24M_CTRL_RC_24M_CONTROL_MODE_MASK)) | in CLOCK_SetClockSourceControlMode()
1557 ANADIG_OSC->OSC_400M_CTRL1 = in CLOCK_SetClockSourceControlMode()
1558 … (ANADIG_OSC->OSC_400M_CTRL1 & (~ANADIG_OSC_OSC_400M_CTRL1_RC_400M_CONTROL_MODE_MASK)) | in CLOCK_SetClockSourceControlMode()
1563 ANADIG_OSC->OSC_24M_CTRL = in CLOCK_SetClockSourceControlMode()
[all …]
Dfsl_clock.h1734 ANADIG_OSC->OSC_RC24M_CTRL |= ANADIG_OSC_OSC_RC24M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOscRc24M()
1738 ANADIG_OSC->OSC_RC24M_CTRL &= ~ANADIG_OSC_OSC_RC24M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOscRc24M()
1761 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
1765 ANADIG_OSC->OSC_24M_CTRL &= ~ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
1794 ANADIG_OSC->OSC_400M_CTRL1 |= ANADIG_OSC_OSC_400M_CTRL1_CLKGATE_400MEG_MASK; in CLOCK_OSC_GateOscRc400M()
1798 ANADIG_OSC->OSC_400M_CTRL1 &= ~ANADIG_OSC_OSC_400M_CTRL1_CLKGATE_400MEG_MASK; in CLOCK_OSC_GateOscRc400M()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/
Dfsl_clock.c1055 if (0UL == (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK)) in CLOCK_OSC_EnableOsc24M()
1057 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK; in CLOCK_OSC_EnableOsc24M()
1059 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in CLOCK_OSC_EnableOsc24M()
1075 tmp32 = ANADIG_OSC->OSC_24M_CTRL; in CLOCK_OSC_SetOsc24MWorkMode()
1079 ANADIG_OSC->OSC_24M_CTRL = tmp32; in CLOCK_OSC_SetOsc24MWorkMode()
1552 ANADIG_OSC->OSC_RC24M_CTRL = in CLOCK_SetClockSourceControlMode()
1553 … (ANADIG_OSC->OSC_RC24M_CTRL & ~(ANADIG_OSC_OSC_RC24M_CTRL_RC_24M_CONTROL_MODE_MASK)) | in CLOCK_SetClockSourceControlMode()
1557 ANADIG_OSC->OSC_400M_CTRL1 = in CLOCK_SetClockSourceControlMode()
1558 … (ANADIG_OSC->OSC_400M_CTRL1 & (~ANADIG_OSC_OSC_400M_CTRL1_RC_400M_CONTROL_MODE_MASK)) | in CLOCK_SetClockSourceControlMode()
1563 ANADIG_OSC->OSC_24M_CTRL = in CLOCK_SetClockSourceControlMode()
[all …]
Dfsl_clock.h1734 ANADIG_OSC->OSC_RC24M_CTRL |= ANADIG_OSC_OSC_RC24M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOscRc24M()
1738 ANADIG_OSC->OSC_RC24M_CTRL &= ~ANADIG_OSC_OSC_RC24M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOscRc24M()
1761 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
1765 ANADIG_OSC->OSC_24M_CTRL &= ~ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
1794 ANADIG_OSC->OSC_400M_CTRL1 |= ANADIG_OSC_OSC_400M_CTRL1_CLKGATE_400MEG_MASK; in CLOCK_OSC_GateOscRc400M()
1798 ANADIG_OSC->OSC_400M_CTRL1 &= ~ANADIG_OSC_OSC_400M_CTRL1_CLKGATE_400MEG_MASK; in CLOCK_OSC_GateOscRc400M()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/
Dfsl_clock.c1055 if (0UL == (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK)) in CLOCK_OSC_EnableOsc24M()
1057 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK; in CLOCK_OSC_EnableOsc24M()
1059 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in CLOCK_OSC_EnableOsc24M()
1075 tmp32 = ANADIG_OSC->OSC_24M_CTRL; in CLOCK_OSC_SetOsc24MWorkMode()
1079 ANADIG_OSC->OSC_24M_CTRL = tmp32; in CLOCK_OSC_SetOsc24MWorkMode()
1552 ANADIG_OSC->OSC_RC24M_CTRL = in CLOCK_SetClockSourceControlMode()
1553 … (ANADIG_OSC->OSC_RC24M_CTRL & ~(ANADIG_OSC_OSC_RC24M_CTRL_RC_24M_CONTROL_MODE_MASK)) | in CLOCK_SetClockSourceControlMode()
1557 ANADIG_OSC->OSC_400M_CTRL1 = in CLOCK_SetClockSourceControlMode()
1558 … (ANADIG_OSC->OSC_400M_CTRL1 & (~ANADIG_OSC_OSC_400M_CTRL1_RC_400M_CONTROL_MODE_MASK)) | in CLOCK_SetClockSourceControlMode()
1563 ANADIG_OSC->OSC_24M_CTRL = in CLOCK_SetClockSourceControlMode()
[all …]
Dfsl_clock.h1734 ANADIG_OSC->OSC_RC24M_CTRL |= ANADIG_OSC_OSC_RC24M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOscRc24M()
1738 ANADIG_OSC->OSC_RC24M_CTRL &= ~ANADIG_OSC_OSC_RC24M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOscRc24M()
1761 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
1765 ANADIG_OSC->OSC_24M_CTRL &= ~ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
1794 ANADIG_OSC->OSC_400M_CTRL1 |= ANADIG_OSC_OSC_400M_CTRL1_CLKGATE_400MEG_MASK; in CLOCK_OSC_GateOscRc400M()
1798 ANADIG_OSC->OSC_400M_CTRL1 &= ~ANADIG_OSC_OSC_400M_CTRL1_CLKGATE_400MEG_MASK; in CLOCK_OSC_GateOscRc400M()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/
Dfsl_clock.c1055 if (0UL == (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK)) in CLOCK_OSC_EnableOsc24M()
1057 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN_MASK; in CLOCK_OSC_EnableOsc24M()
1059 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in CLOCK_OSC_EnableOsc24M()
1075 tmp32 = ANADIG_OSC->OSC_24M_CTRL; in CLOCK_OSC_SetOsc24MWorkMode()
1079 ANADIG_OSC->OSC_24M_CTRL = tmp32; in CLOCK_OSC_SetOsc24MWorkMode()
1552 ANADIG_OSC->OSC_RC24M_CTRL = in CLOCK_SetClockSourceControlMode()
1553 … (ANADIG_OSC->OSC_RC24M_CTRL & ~(ANADIG_OSC_OSC_RC24M_CTRL_RC_24M_CONTROL_MODE_MASK)) | in CLOCK_SetClockSourceControlMode()
1557 ANADIG_OSC->OSC_400M_CTRL1 = in CLOCK_SetClockSourceControlMode()
1558 … (ANADIG_OSC->OSC_400M_CTRL1 & (~ANADIG_OSC_OSC_400M_CTRL1_RC_400M_CONTROL_MODE_MASK)) | in CLOCK_SetClockSourceControlMode()
1563 ANADIG_OSC->OSC_24M_CTRL = in CLOCK_SetClockSourceControlMode()
[all …]
Dfsl_clock.h1734 ANADIG_OSC->OSC_RC24M_CTRL |= ANADIG_OSC_OSC_RC24M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOscRc24M()
1738 ANADIG_OSC->OSC_RC24M_CTRL &= ~ANADIG_OSC_OSC_RC24M_CTRL_TEN_MASK; in CLOCK_OSC_EnableOscRc24M()
1761 ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
1765 ANADIG_OSC->OSC_24M_CTRL &= ~ANADIG_OSC_OSC_24M_CTRL_OSC_24M_GATE_MASK; in CLOCK_OSC_GateOsc24M()
1794 ANADIG_OSC->OSC_400M_CTRL1 |= ANADIG_OSC_OSC_400M_CTRL1_CLKGATE_400MEG_MASK; in CLOCK_OSC_GateOscRc400M()
1798 ANADIG_OSC->OSC_400M_CTRL1 &= ~ANADIG_OSC_OSC_400M_CTRL1_CLKGATE_400MEG_MASK; in CLOCK_OSC_GateOscRc400M()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1160/
Dclock_config.c292 ANADIG_OSC->OSC_16M_CTRL |= ANADIG_OSC_OSC_16M_CTRL_EN_IRC4M16M_MASK; in BOARD_BootClockRUN()
303 …ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN(1) | ANADIG_OSC_OSC_24M_CTRL_BYPASS_EN(… in BOARD_BootClockRUN()
306 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in BOARD_BootClockRUN()
1042 ANADIG_OSC->OSC_16M_CTRL |= ANADIG_OSC_OSC_16M_CTRL_EN_IRC4M16M_MASK; in BOARD_BootClockRUN_500M()
1053 …ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN(1) | ANADIG_OSC_OSC_24M_CTRL_BYPASS_EN(… in BOARD_BootClockRUN_500M()
1056 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in BOARD_BootClockRUN_500M()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1170/
Dclock_config.c340 ANADIG_OSC->OSC_16M_CTRL |= ANADIG_OSC_OSC_16M_CTRL_EN_IRC4M16M_MASK; in BOARD_BootClockRUN()
351 …ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN(1) | ANADIG_OSC_OSC_24M_CTRL_BYPASS_EN(… in BOARD_BootClockRUN()
354 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in BOARD_BootClockRUN()
1155 ANADIG_OSC->OSC_16M_CTRL |= ANADIG_OSC_OSC_16M_CTRL_EN_IRC4M16M_MASK; in BOARD_BootClockRUN_800M()
1166 …ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN(1) | ANADIG_OSC_OSC_24M_CTRL_BYPASS_EN(… in BOARD_BootClockRUN_800M()
1169 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in BOARD_BootClockRUN_800M()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkbmimxrt1170/
Dclock_config.c340 ANADIG_OSC->OSC_16M_CTRL |= ANADIG_OSC_OSC_16M_CTRL_EN_IRC4M16M_MASK; in BOARD_BootClockRUN()
351 …ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN(1) | ANADIG_OSC_OSC_24M_CTRL_BYPASS_EN(… in BOARD_BootClockRUN()
354 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in BOARD_BootClockRUN()
1155 ANADIG_OSC->OSC_16M_CTRL |= ANADIG_OSC_OSC_16M_CTRL_EN_IRC4M16M_MASK; in BOARD_BootClockRUN_800M()
1166 …ANADIG_OSC->OSC_24M_CTRL |= ANADIG_OSC_OSC_24M_CTRL_OSC_EN(1) | ANADIG_OSC_OSC_24M_CTRL_BYPASS_EN(… in BOARD_BootClockRUN_800M()
1169 (ANADIG_OSC->OSC_24M_CTRL & ANADIG_OSC_OSC_24M_CTRL_OSC_24M_STABLE_MASK)) in BOARD_BootClockRUN_800M()

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