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Searched refs:ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK (Results 1 – 25 of 46) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5526/drivers/
Dfsl_power.c1537 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S26/drivers/
Dfsl_power.c1537 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S28/drivers/
Dfsl_power.c1537 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/drivers/
Dfsl_power.c1537 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/drivers/
Dfsl_power.c1537 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5528/drivers/
Dfsl_power.c1537 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/drivers/
Dfsl_power.c1560 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/drivers/
Dfsl_power.c1560 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5516/drivers/
Dfsl_power.c1628 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5512/drivers/
Dfsl_power.c1628 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S04/drivers/
Dfsl_power.c1578 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504/drivers/
Dfsl_power.c1560 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S16/drivers/
Dfsl_power.c1628 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S06/drivers/
Dfsl_power.c1578 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S14/drivers/
Dfsl_power.c1628 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/drivers/
Dfsl_power.c1560 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5514/drivers/
Dfsl_power.c1628 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506/drivers/
Dfsl_power.c1560 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/drivers/
Dfsl_power.c1560 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/drivers/
Dfsl_clock.c2314 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in CLOCK_XtalHfCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/drivers/
Dfsl_clock.c2314 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in CLOCK_XtalHfCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/drivers/
Dfsl_clock.c2314 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in CLOCK_XtalHfCapabankTrim()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h3893 #define ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK (0x7F00U) macro
3897 …2_t)(((uint32_t)(x)) << ANACTRL_XO32M_CTRL_OSC_CAP_IN_SHIFT)) & ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h3848 #define ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK (0x7F00U) macro
3852 …2_t)(((uint32_t)(x)) << ANACTRL_XO32M_CTRL_OSC_CAP_IN_SHIFT)) & ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h3848 #define ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK (0x7F00U) macro
3852 …2_t)(((uint32_t)(x)) << ANACTRL_XO32M_CTRL_OSC_CAP_IN_SHIFT)) & ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK)

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