Searched refs:AI_RCOSC400M_CTRL2_TUNE_EN_MASK (Results 1 – 14 of 14) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/ |
| D | fsl_anatop_ai.h | 324 …(uint32_t)(((uint32_t)(x)) << AI_RCOSC400M_CTRL2_TUNE_EN_SHIFT)) & AI_RCOSC400M_CTRL2_TUNE_EN_MASK)
325 #define AI_RCOSC400M_CTRL2_TUNE_EN_MASK (0x1000U) macro
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| D | fsl_clock.c | 1350 ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL2_SET, AI_RCOSC400M_CTRL2_TUNE_EN_MASK); in CLOCK_OSC_FreezeOscRc400MTuneValue()
1354 ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL2_CLR, AI_RCOSC400M_CTRL2_TUNE_EN_MASK); in CLOCK_OSC_FreezeOscRc400MTuneValue()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/ |
| D | fsl_anatop_ai.h | 324 …(uint32_t)(((uint32_t)(x)) << AI_RCOSC400M_CTRL2_TUNE_EN_SHIFT)) & AI_RCOSC400M_CTRL2_TUNE_EN_MASK)
325 #define AI_RCOSC400M_CTRL2_TUNE_EN_MASK (0x1000U) macro
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| D | fsl_clock.c | 1341 ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL2_SET, AI_RCOSC400M_CTRL2_TUNE_EN_MASK); in CLOCK_OSC_FreezeOscRc400MTuneValue()
1345 ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL2_CLR, AI_RCOSC400M_CTRL2_TUNE_EN_MASK); in CLOCK_OSC_FreezeOscRc400MTuneValue()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/ |
| D | fsl_anatop_ai.h | 324 …(uint32_t)(((uint32_t)(x)) << AI_RCOSC400M_CTRL2_TUNE_EN_SHIFT)) & AI_RCOSC400M_CTRL2_TUNE_EN_MASK)
325 #define AI_RCOSC400M_CTRL2_TUNE_EN_MASK (0x1000U) macro
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| D | fsl_clock.c | 1350 ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL2_SET, AI_RCOSC400M_CTRL2_TUNE_EN_MASK); in CLOCK_OSC_FreezeOscRc400MTuneValue()
1354 ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL2_CLR, AI_RCOSC400M_CTRL2_TUNE_EN_MASK); in CLOCK_OSC_FreezeOscRc400MTuneValue()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/ |
| D | fsl_anatop_ai.h | 324 …(uint32_t)(((uint32_t)(x)) << AI_RCOSC400M_CTRL2_TUNE_EN_SHIFT)) & AI_RCOSC400M_CTRL2_TUNE_EN_MASK)
325 #define AI_RCOSC400M_CTRL2_TUNE_EN_MASK (0x1000U) macro
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| D | fsl_clock.c | 1350 ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL2_SET, AI_RCOSC400M_CTRL2_TUNE_EN_MASK); in CLOCK_OSC_FreezeOscRc400MTuneValue()
1354 ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL2_CLR, AI_RCOSC400M_CTRL2_TUNE_EN_MASK); in CLOCK_OSC_FreezeOscRc400MTuneValue()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/ |
| D | fsl_anatop_ai.h | 324 …(uint32_t)(((uint32_t)(x)) << AI_RCOSC400M_CTRL2_TUNE_EN_SHIFT)) & AI_RCOSC400M_CTRL2_TUNE_EN_MASK)
325 #define AI_RCOSC400M_CTRL2_TUNE_EN_MASK (0x1000U) macro
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| D | fsl_clock.c | 1350 ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL2_SET, AI_RCOSC400M_CTRL2_TUNE_EN_MASK); in CLOCK_OSC_FreezeOscRc400MTuneValue()
1354 ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL2_CLR, AI_RCOSC400M_CTRL2_TUNE_EN_MASK); in CLOCK_OSC_FreezeOscRc400MTuneValue()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/ |
| D | fsl_anatop_ai.h | 324 …(uint32_t)(((uint32_t)(x)) << AI_RCOSC400M_CTRL2_TUNE_EN_SHIFT)) & AI_RCOSC400M_CTRL2_TUNE_EN_MASK)
325 #define AI_RCOSC400M_CTRL2_TUNE_EN_MASK (0x1000U) macro
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| D | fsl_clock.c | 1341 ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL2_SET, AI_RCOSC400M_CTRL2_TUNE_EN_MASK); in CLOCK_OSC_FreezeOscRc400MTuneValue()
1345 ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL2_CLR, AI_RCOSC400M_CTRL2_TUNE_EN_MASK); in CLOCK_OSC_FreezeOscRc400MTuneValue()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/ |
| D | fsl_anatop_ai.h | 324 …(uint32_t)(((uint32_t)(x)) << AI_RCOSC400M_CTRL2_TUNE_EN_SHIFT)) & AI_RCOSC400M_CTRL2_TUNE_EN_MASK)
325 #define AI_RCOSC400M_CTRL2_TUNE_EN_MASK (0x1000U) macro
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| D | fsl_clock.c | 1350 ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL2_SET, AI_RCOSC400M_CTRL2_TUNE_EN_MASK); in CLOCK_OSC_FreezeOscRc400MTuneValue()
1354 ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL2_CLR, AI_RCOSC400M_CTRL2_TUNE_EN_MASK); in CLOCK_OSC_FreezeOscRc400MTuneValue()
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