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Searched refs:AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_anatop_ai.h311 …(((uint32_t)(((uint32_t)(x)) << AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT)) & AI_RCOSC400M_CTRL1_TARGE…
313 #define AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT (16U) macro
Dfsl_clock.c1416 …uint16_t)((tmp32 & AI_RCOSC400M_CTRL1_TARGET_COUNT_MASK) >> AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT); in CLOCK_OSC_SetLocked1MHzCount()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_anatop_ai.h311 …(((uint32_t)(((uint32_t)(x)) << AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT)) & AI_RCOSC400M_CTRL1_TARGE…
313 #define AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT (16U) macro
Dfsl_clock.c1407 …uint16_t)((tmp32 & AI_RCOSC400M_CTRL1_TARGET_COUNT_MASK) >> AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT); in CLOCK_OSC_SetLocked1MHzCount()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_anatop_ai.h311 …(((uint32_t)(((uint32_t)(x)) << AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT)) & AI_RCOSC400M_CTRL1_TARGE…
313 #define AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT (16U) macro
Dfsl_clock.c1416 …uint16_t)((tmp32 & AI_RCOSC400M_CTRL1_TARGET_COUNT_MASK) >> AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT); in CLOCK_OSC_SetLocked1MHzCount()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_anatop_ai.h311 …(((uint32_t)(((uint32_t)(x)) << AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT)) & AI_RCOSC400M_CTRL1_TARGE…
313 #define AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT (16U) macro
Dfsl_clock.c1416 …uint16_t)((tmp32 & AI_RCOSC400M_CTRL1_TARGET_COUNT_MASK) >> AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT); in CLOCK_OSC_SetLocked1MHzCount()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_anatop_ai.h311 …(((uint32_t)(((uint32_t)(x)) << AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT)) & AI_RCOSC400M_CTRL1_TARGE…
313 #define AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT (16U) macro
Dfsl_clock.c1416 …uint16_t)((tmp32 & AI_RCOSC400M_CTRL1_TARGET_COUNT_MASK) >> AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT); in CLOCK_OSC_SetLocked1MHzCount()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_anatop_ai.h311 …(((uint32_t)(((uint32_t)(x)) << AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT)) & AI_RCOSC400M_CTRL1_TARGE…
313 #define AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT (16U) macro
Dfsl_clock.c1407 …uint16_t)((tmp32 & AI_RCOSC400M_CTRL1_TARGET_COUNT_MASK) >> AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT); in CLOCK_OSC_SetLocked1MHzCount()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_anatop_ai.h311 …(((uint32_t)(((uint32_t)(x)) << AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT)) & AI_RCOSC400M_CTRL1_TARGE…
313 #define AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT (16U) macro
Dfsl_clock.c1416 …uint16_t)((tmp32 & AI_RCOSC400M_CTRL1_TARGET_COUNT_MASK) >> AI_RCOSC400M_CTRL1_TARGET_COUNT_SHIFT); in CLOCK_OSC_SetLocked1MHzCount()