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Searched refs:AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_anatop_ai.h466 …(((uint32_t)(((uint32_t)(x)) << AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT)) & AI_PLLVIDEO_CTRL0_PLL_REG_E…
468 #define AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT (22U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_anatop_ai.h466 …(((uint32_t)(((uint32_t)(x)) << AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT)) & AI_PLLVIDEO_CTRL0_PLL_REG_E…
468 #define AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT (22U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_anatop_ai.h466 …(((uint32_t)(((uint32_t)(x)) << AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT)) & AI_PLLVIDEO_CTRL0_PLL_REG_E…
468 #define AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT (22U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_anatop_ai.h466 …(((uint32_t)(((uint32_t)(x)) << AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT)) & AI_PLLVIDEO_CTRL0_PLL_REG_E…
468 #define AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT (22U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_anatop_ai.h466 …(((uint32_t)(((uint32_t)(x)) << AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT)) & AI_PLLVIDEO_CTRL0_PLL_REG_E…
468 #define AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT (22U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_anatop_ai.h466 …(((uint32_t)(((uint32_t)(x)) << AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT)) & AI_PLLVIDEO_CTRL0_PLL_REG_E…
468 #define AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT (22U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_anatop_ai.h466 …(((uint32_t)(((uint32_t)(x)) << AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT)) & AI_PLLVIDEO_CTRL0_PLL_REG_E…
468 #define AI_PLLVIDEO_CTRL0_PLL_REG_EN_SHIFT (22U) macro