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Searched refs:AI_PHY_LDO_CTRL0_OUTPUT_TRG (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_pmu.c200 (AI_PHY_LDO_CTRL0_OUTPUT_TRG(0x10) | AI_PHY_LDO_CTRL0_LINREG_EN_MASK)) in PMU_StaticEnablePllLdo()
204 …(AI_PHY_LDO_CTRL0_OUTPUT_TRG(0x10) | AI_PHY_LDO_CTRL0_LINREG_EN_MASK | AI_PHY_LDO_CTRL0_LIMIT_EN_M… in PMU_StaticEnablePllLdo()
Dfsl_anatop_ai.h156 #define AI_PHY_LDO_CTRL0_OUTPUT_TRG(x) \ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_pmu.c200 (AI_PHY_LDO_CTRL0_OUTPUT_TRG(0x10) | AI_PHY_LDO_CTRL0_LINREG_EN_MASK)) in PMU_StaticEnablePllLdo()
204 …(AI_PHY_LDO_CTRL0_OUTPUT_TRG(0x10) | AI_PHY_LDO_CTRL0_LINREG_EN_MASK | AI_PHY_LDO_CTRL0_LIMIT_EN_M… in PMU_StaticEnablePllLdo()
Dfsl_anatop_ai.h156 #define AI_PHY_LDO_CTRL0_OUTPUT_TRG(x) \ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_pmu.c200 (AI_PHY_LDO_CTRL0_OUTPUT_TRG(0x10) | AI_PHY_LDO_CTRL0_LINREG_EN_MASK)) in PMU_StaticEnablePllLdo()
204 …(AI_PHY_LDO_CTRL0_OUTPUT_TRG(0x10) | AI_PHY_LDO_CTRL0_LINREG_EN_MASK | AI_PHY_LDO_CTRL0_LIMIT_EN_M… in PMU_StaticEnablePllLdo()
Dfsl_anatop_ai.h156 #define AI_PHY_LDO_CTRL0_OUTPUT_TRG(x) \ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_pmu.c200 (AI_PHY_LDO_CTRL0_OUTPUT_TRG(0x10) | AI_PHY_LDO_CTRL0_LINREG_EN_MASK)) in PMU_StaticEnablePllLdo()
204 …(AI_PHY_LDO_CTRL0_OUTPUT_TRG(0x10) | AI_PHY_LDO_CTRL0_LINREG_EN_MASK | AI_PHY_LDO_CTRL0_LIMIT_EN_M… in PMU_StaticEnablePllLdo()
Dfsl_anatop_ai.h156 #define AI_PHY_LDO_CTRL0_OUTPUT_TRG(x) \ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_pmu.c200 (AI_PHY_LDO_CTRL0_OUTPUT_TRG(0x10) | AI_PHY_LDO_CTRL0_LINREG_EN_MASK)) in PMU_StaticEnablePllLdo()
204 …(AI_PHY_LDO_CTRL0_OUTPUT_TRG(0x10) | AI_PHY_LDO_CTRL0_LINREG_EN_MASK | AI_PHY_LDO_CTRL0_LIMIT_EN_M… in PMU_StaticEnablePllLdo()
Dfsl_anatop_ai.h156 #define AI_PHY_LDO_CTRL0_OUTPUT_TRG(x) \ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_pmu.c200 (AI_PHY_LDO_CTRL0_OUTPUT_TRG(0x10) | AI_PHY_LDO_CTRL0_LINREG_EN_MASK)) in PMU_StaticEnablePllLdo()
204 …(AI_PHY_LDO_CTRL0_OUTPUT_TRG(0x10) | AI_PHY_LDO_CTRL0_LINREG_EN_MASK | AI_PHY_LDO_CTRL0_LIMIT_EN_M… in PMU_StaticEnablePllLdo()
Dfsl_anatop_ai.h156 #define AI_PHY_LDO_CTRL0_OUTPUT_TRG(x) \ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_pmu.c200 (AI_PHY_LDO_CTRL0_OUTPUT_TRG(0x10) | AI_PHY_LDO_CTRL0_LINREG_EN_MASK)) in PMU_StaticEnablePllLdo()
204 …(AI_PHY_LDO_CTRL0_OUTPUT_TRG(0x10) | AI_PHY_LDO_CTRL0_LINREG_EN_MASK | AI_PHY_LDO_CTRL0_LIMIT_EN_M… in PMU_StaticEnablePllLdo()
Dfsl_anatop_ai.h156 #define AI_PHY_LDO_CTRL0_OUTPUT_TRG(x) \ macro