Home
last modified time | relevance | path

Searched refs:AIPS_PACRB_TP5_MASK (Results 1 – 21 of 21) sorted by relevance

/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K144W_AIPS.h194 #define AIPS_PACRB_TP5_MASK (0x100U) macro
197 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
DS32K116_AIPS.h194 #define AIPS_PACRB_TP5_MASK (0x100U) macro
197 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
DS32K118_AIPS.h194 #define AIPS_PACRB_TP5_MASK (0x100U) macro
197 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
DS32K142_AIPS.h194 #define AIPS_PACRB_TP5_MASK (0x100U) macro
197 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
DS32K142W_AIPS.h194 #define AIPS_PACRB_TP5_MASK (0x100U) macro
197 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
DS32K144_AIPS.h194 #define AIPS_PACRB_TP5_MASK (0x100U) macro
197 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
DS32K146_AIPS.h194 #define AIPS_PACRB_TP5_MASK (0x100U) macro
197 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
DS32K148_AIPS.h209 #define AIPS_PACRB_TP5_MASK (0x100U) macro
212 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h1111 #define AIPS_PACRB_TP5_MASK (0x100U) macro
1117 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h1357 #define AIPS_PACRB_TP5_MASK (0x100U) macro
1363 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h1365 #define AIPS_PACRB_TP5_MASK (0x100U) macro
1371 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h1352 #define AIPS_PACRB_TP5_MASK (0x100U) macro
1358 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h1589 #define AIPS_PACRB_TP5_MASK (0x100U) macro
1595 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h1589 #define AIPS_PACRB_TP5_MASK (0x100U) macro
1595 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h1284 #define AIPS_PACRB_TP5_MASK (0x100U) macro
1290 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h1278 #define AIPS_PACRB_TP5_MASK (0x100U) macro
1284 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h1279 #define AIPS_PACRB_TP5_MASK (0x100U) macro
1285 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h1277 #define AIPS_PACRB_TP5_MASK (0x100U) macro
1283 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h1412 #define AIPS_PACRB_TP5_MASK (0x100U) macro
1418 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h1429 #define AIPS_PACRB_TP5_MASK (0x100U) macro
1435 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h1429 #define AIPS_PACRB_TP5_MASK (0x100U) macro
1435 … (((uint32_t)(((uint32_t)(x)) << AIPS_PACRB_TP5_SHIFT)) & AIPS_PACRB_TP5_MASK)