Home
last modified time | relevance | path

Searched refs:AHB_SECURE_CTRL_RAM31_RULE_RULE2_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h4211 #define AHB_SECURE_CTRL_RAM31_RULE_RULE2_MASK (0x300U) macro
4219 …(uint32_t)(x)) << AHB_SECURE_CTRL_RAM31_RULE_RULE2_SHIFT)) & AHB_SECURE_CTRL_RAM31_RULE_RULE2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_cm33.h4215 #define AHB_SECURE_CTRL_RAM31_RULE_RULE2_MASK (0x300U) macro
4223 …(uint32_t)(x)) << AHB_SECURE_CTRL_RAM31_RULE_RULE2_SHIFT)) & AHB_SECURE_CTRL_RAM31_RULE_RULE2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h4214 #define AHB_SECURE_CTRL_RAM31_RULE_RULE2_MASK (0x300U) macro
4222 …(uint32_t)(x)) << AHB_SECURE_CTRL_RAM31_RULE_RULE2_SHIFT)) & AHB_SECURE_CTRL_RAM31_RULE_RULE2_MASK)