Home
last modified time | relevance | path

Searched refs:AHB_SECURE_CTRL_RAM31_RULE_RULE1_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h4201 #define AHB_SECURE_CTRL_RAM31_RULE_RULE1_MASK (0x30U) macro
4209 …(uint32_t)(x)) << AHB_SECURE_CTRL_RAM31_RULE_RULE1_SHIFT)) & AHB_SECURE_CTRL_RAM31_RULE_RULE1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_cm33.h4205 #define AHB_SECURE_CTRL_RAM31_RULE_RULE1_MASK (0x30U) macro
4213 …(uint32_t)(x)) << AHB_SECURE_CTRL_RAM31_RULE_RULE1_SHIFT)) & AHB_SECURE_CTRL_RAM31_RULE_RULE1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h4204 #define AHB_SECURE_CTRL_RAM31_RULE_RULE1_MASK (0x30U) macro
4212 …(uint32_t)(x)) << AHB_SECURE_CTRL_RAM31_RULE_RULE1_SHIFT)) & AHB_SECURE_CTRL_RAM31_RULE_RULE1_MASK)