Home
last modified time | relevance | path

Searched refs:AHBSC4_SRAM_8_RULE_RULE5_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h7602 #define AHBSC4_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
7610 … (((uint32_t)(((uint32_t)(x)) << AHBSC4_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC4_SRAM_8_RULE_RULE5_MASK)
DMIMXRT735S_cm33_core1.h7636 #define AHBSC4_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
7644 … (((uint32_t)(((uint32_t)(x)) << AHBSC4_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC4_SRAM_8_RULE_RULE5_MASK)
DMIMXRT735S_ezhv.h13593 #define AHBSC4_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
13601 … (((uint32_t)(((uint32_t)(x)) << AHBSC4_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC4_SRAM_8_RULE_RULE5_MASK)
DMIMXRT735S_cm33_core0.h14011 #define AHBSC4_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
14019 … (((uint32_t)(((uint32_t)(x)) << AHBSC4_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC4_SRAM_8_RULE_RULE5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h7636 #define AHBSC4_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
7644 … (((uint32_t)(((uint32_t)(x)) << AHBSC4_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC4_SRAM_8_RULE_RULE5_MASK)
DMIMXRT758S_hifi1.h7602 #define AHBSC4_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
7610 … (((uint32_t)(((uint32_t)(x)) << AHBSC4_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC4_SRAM_8_RULE_RULE5_MASK)
DMIMXRT758S_cm33_core0.h14011 #define AHBSC4_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
14019 … (((uint32_t)(((uint32_t)(x)) << AHBSC4_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC4_SRAM_8_RULE_RULE5_MASK)
DMIMXRT758S_ezhv.h13593 #define AHBSC4_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
13601 … (((uint32_t)(((uint32_t)(x)) << AHBSC4_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC4_SRAM_8_RULE_RULE5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h7602 #define AHBSC4_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
7610 … (((uint32_t)(((uint32_t)(x)) << AHBSC4_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC4_SRAM_8_RULE_RULE5_MASK)
DMIMXRT798S_cm33_core1.h7636 #define AHBSC4_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
7644 … (((uint32_t)(((uint32_t)(x)) << AHBSC4_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC4_SRAM_8_RULE_RULE5_MASK)
DMIMXRT798S_hifi4.h13968 #define AHBSC4_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
13976 … (((uint32_t)(((uint32_t)(x)) << AHBSC4_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC4_SRAM_8_RULE_RULE5_MASK)
DMIMXRT798S_cm33_core0.h14011 #define AHBSC4_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
14019 … (((uint32_t)(((uint32_t)(x)) << AHBSC4_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC4_SRAM_8_RULE_RULE5_MASK)
DMIMXRT798S_ezhv.h13593 #define AHBSC4_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
13601 … (((uint32_t)(((uint32_t)(x)) << AHBSC4_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC4_SRAM_8_RULE_RULE5_MASK)