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Searched refs:AHBSC3_SRAM_8_RULE_RULE5_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h2146 #define AHBSC3_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
2154 … (((uint32_t)(((uint32_t)(x)) << AHBSC3_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC3_SRAM_8_RULE_RULE5_MASK)
DMIMXRT735S_cm33_core1.h2180 #define AHBSC3_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
2188 … (((uint32_t)(((uint32_t)(x)) << AHBSC3_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC3_SRAM_8_RULE_RULE5_MASK)
DMIMXRT735S_ezhv.h8180 #define AHBSC3_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
8188 … (((uint32_t)(((uint32_t)(x)) << AHBSC3_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC3_SRAM_8_RULE_RULE5_MASK)
DMIMXRT735S_cm33_core0.h8555 #define AHBSC3_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
8563 … (((uint32_t)(((uint32_t)(x)) << AHBSC3_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC3_SRAM_8_RULE_RULE5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h2180 #define AHBSC3_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
2188 … (((uint32_t)(((uint32_t)(x)) << AHBSC3_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC3_SRAM_8_RULE_RULE5_MASK)
DMIMXRT758S_hifi1.h2146 #define AHBSC3_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
2154 … (((uint32_t)(((uint32_t)(x)) << AHBSC3_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC3_SRAM_8_RULE_RULE5_MASK)
DMIMXRT758S_cm33_core0.h8555 #define AHBSC3_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
8563 … (((uint32_t)(((uint32_t)(x)) << AHBSC3_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC3_SRAM_8_RULE_RULE5_MASK)
DMIMXRT758S_ezhv.h8180 #define AHBSC3_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
8188 … (((uint32_t)(((uint32_t)(x)) << AHBSC3_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC3_SRAM_8_RULE_RULE5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h2146 #define AHBSC3_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
2154 … (((uint32_t)(((uint32_t)(x)) << AHBSC3_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC3_SRAM_8_RULE_RULE5_MASK)
DMIMXRT798S_cm33_core1.h2180 #define AHBSC3_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
2188 … (((uint32_t)(((uint32_t)(x)) << AHBSC3_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC3_SRAM_8_RULE_RULE5_MASK)
DMIMXRT798S_hifi4.h8512 #define AHBSC3_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
8520 … (((uint32_t)(((uint32_t)(x)) << AHBSC3_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC3_SRAM_8_RULE_RULE5_MASK)
DMIMXRT798S_cm33_core0.h8555 #define AHBSC3_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
8563 … (((uint32_t)(((uint32_t)(x)) << AHBSC3_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC3_SRAM_8_RULE_RULE5_MASK)
DMIMXRT798S_ezhv.h8180 #define AHBSC3_SRAM_8_RULE_RULE5_MASK (0x300000U) macro
8188 … (((uint32_t)(((uint32_t)(x)) << AHBSC3_SRAM_8_RULE_RULE5_SHIFT)) & AHBSC3_SRAM_8_RULE_RULE5_MASK)