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Searched refs:AHBSC0_SRAM_20_RULE_RULE4_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h3701 #define AHBSC0_SRAM_20_RULE_RULE4_MASK (0x30000U) macro
3709 …(((uint32_t)(((uint32_t)(x)) << AHBSC0_SRAM_20_RULE_RULE4_SHIFT)) & AHBSC0_SRAM_20_RULE_RULE4_MASK)
DMIMXRT798S_cm33_core0.h3744 #define AHBSC0_SRAM_20_RULE_RULE4_MASK (0x30000U) macro
3752 …(((uint32_t)(((uint32_t)(x)) << AHBSC0_SRAM_20_RULE_RULE4_SHIFT)) & AHBSC0_SRAM_20_RULE_RULE4_MASK)
DMIMXRT798S_ezhv.h3412 #define AHBSC0_SRAM_20_RULE_RULE4_MASK (0x30000U) macro
3420 …(((uint32_t)(((uint32_t)(x)) << AHBSC0_SRAM_20_RULE_RULE4_SHIFT)) & AHBSC0_SRAM_20_RULE_RULE4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h3412 #define AHBSC0_SRAM_20_RULE_RULE4_MASK (0x30000U) macro
3420 …(((uint32_t)(((uint32_t)(x)) << AHBSC0_SRAM_20_RULE_RULE4_SHIFT)) & AHBSC0_SRAM_20_RULE_RULE4_MASK)
DMIMXRT735S_cm33_core0.h3744 #define AHBSC0_SRAM_20_RULE_RULE4_MASK (0x30000U) macro
3752 …(((uint32_t)(((uint32_t)(x)) << AHBSC0_SRAM_20_RULE_RULE4_SHIFT)) & AHBSC0_SRAM_20_RULE_RULE4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h3744 #define AHBSC0_SRAM_20_RULE_RULE4_MASK (0x30000U) macro
3752 …(((uint32_t)(((uint32_t)(x)) << AHBSC0_SRAM_20_RULE_RULE4_SHIFT)) & AHBSC0_SRAM_20_RULE_RULE4_MASK)
DMIMXRT758S_ezhv.h3412 #define AHBSC0_SRAM_20_RULE_RULE4_MASK (0x30000U) macro
3420 …(((uint32_t)(((uint32_t)(x)) << AHBSC0_SRAM_20_RULE_RULE4_SHIFT)) & AHBSC0_SRAM_20_RULE_RULE4_MASK)