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Searched refs:ADMA__GPT0_BASE (Results 1 – 15 of 15) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/
DMIMX8QX2_cm4.h49051 #define ADMA__GPT0_BASE (0x590B0000u) macro
49053 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
49095 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/
DMIMX8QX1_cm4.h49051 #define ADMA__GPT0_BASE (0x590B0000u) macro
49053 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
49095 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX1/
DMIMX8DX1_cm4.h49051 #define ADMA__GPT0_BASE (0x590B0000u) macro
49053 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
49095 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/
DMIMX8DX2_cm4.h49051 #define ADMA__GPT0_BASE (0x590B0000u) macro
49053 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
49095 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h49614 #define ADMA__GPT0_BASE (0x590B0000u) macro
49616 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
49658 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h49614 #define ADMA__GPT0_BASE (0x590B0000u) macro
49616 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
49658 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h49614 #define ADMA__GPT0_BASE (0x590B0000u) macro
49616 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
49658 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h50699 #define ADMA__GPT0_BASE (0x590B0000u) macro
50701 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
50743 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…
DMIMX8QX6_cm4.h49616 #define ADMA__GPT0_BASE (0x590B0000u) macro
49618 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
49660 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h49616 #define ADMA__GPT0_BASE (0x590B0000u) macro
49618 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
49660 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h49615 #define ADMA__GPT0_BASE (0x590B0000u) macro
49617 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
49659 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h49616 #define ADMA__GPT0_BASE (0x590B0000u) macro
49618 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
49660 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h49617 #define ADMA__GPT0_BASE (0x590B0000u) macro
49619 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
49661 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h49617 #define ADMA__GPT0_BASE (0x590B0000u) macro
49619 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
49661 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h49613 #define ADMA__GPT0_BASE (0x590B0000u) macro
49615 #define ADMA__GPT0 ((GPT_Type *)ADMA__GPT0_BASE)
49657 #define GPT_BASE_ADDRS { ADMA__GPT0_BASE, ADMA__GPT1_BASE, ADMA__GPT2_BAS…