1 /*
2 * Copyright 2020-2024 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7 #ifndef FSL_ADC_H_
8 #define FSL_ADC_H_
9
10 #include "fsl_common.h"
11
12 /*!
13 * @addtogroup adc
14 * @{
15 */
16
17 /*******************************************************************************
18 * Definitions
19 ******************************************************************************/
20
21 /*! @brief ADC driver version */
22 #define FSL_ADC_DRIVER_VERSION (MAKE_VERSION(2, 2, 0)) /*!< Version 2.2.0. */
23
24 /*!
25 * @brief The enumeration of interrupts, this enumeration can be used to enable/disable interrupts.
26 */
27 enum _adc_interrupt_enable
28 {
29 kADC_DataReadyInterruptEnable = ADC_ADC_REG_IMR_RDY_MASK_MASK, /*!< Conversion data ready interrupt. */
30 kADC_GainSaturationInterruptEnable = ADC_ADC_REG_IMR_GAINSAT_MASK_MASK, /*!< Gain correction saturation interrupt */
31 kADC_OffsetSaturationInterruptEnable = ADC_ADC_REG_IMR_OFFSAT_MASK_MASK, /*!< Offset correction
32 saturation interupt enable. */
33 kADC_NegativeSaturationInterruptEnable = ADC_ADC_REG_IMR_DATASAT_NEG_MASK_MASK, /*!< ADC data negative side
34 saturation interrupt enable. */
35 kADC_PositiveSaturationInterruptEnable = ADC_ADC_REG_IMR_DATASAT_POS_MASK_MASK, /*!< ADC data positive side
36 saturation interrupt enable. */
37 kADC_FifoOverrunInterruptEnable = ADC_ADC_REG_IMR_FIFO_OVERRUN_MASK_MASK, /*!< FIFO overrun interrupt enable. */
38 kADC_FifoUnderrunInterruptEnable = ADC_ADC_REG_IMR_FIFO_UNDERRUN_MASK_MASK, /*!< FIFO underrun interrupt enable. */
39 };
40
41 /*!
42 * @brief The enumeration of adc status flags, including interrupt flags, raw flags, and so on.
43 *
44 * @note The raw flags will be captured regardless the interrupt mask. Both interrupt flags and raw
45 * flags can be cleared.
46 */
47 enum _adc_status_flags
48 {
49 /* Interrupt flags. */
50 kADC_DataReadyInterruptFlag = 1UL << 0UL, /*!< Conversion Data Ready interrupt flag. */
51 kADC_GainSaturationInterruptFlag = 1UL << 1UL, /*!< Gain correction saturation interrupt flag. */
52 kADC_OffsetSaturationInterruptFlag = 1UL << 2UL, /*!< Offset correction saturation interupt flag. */
53 kADC_NegativeSaturationInterruptFlag = 1UL << 3UL, /*!< ADC data negative side saturation interrupt flag. */
54 kADC_PositiveSaturationInterruptFlag = 1UL << 4UL, /*!< ADC data positive side saturation interrupt flag. */
55 kADC_FifoOverrunInterruptFlag = 1UL << 5UL, /*!< FIFO overrun interrupt flag. */
56 kADC_FifoUnderrunInterruptFlag = 1UL << 6UL, /*!< FIFO underrun interrupt flag. */
57
58 /* Raw flags. */
59 kADC_DataReadyRawFlag = 1UL << 7UL, /*!< Conversion data ready raw flag, this flag will be captured
60 regardless the interrupt mask. */
61 kADC_GainSaturationRawFlag = 1UL << 8UL, /*!< Gain correction saturation raw flag, this flag will be
62 captured regardless the interrupt mask. */
63 kADC_OffsetSaturationRawFlag = 1UL << 9UL, /*!< Offset correction saturation raw flag, this flag will be
64 captured regardless the interrupt mask. */
65 kADC_NegativeSaturationRawFlag = 1UL << 10UL, /*!< ADC data negative side saturation raw flag, this flag will
66 be captured regardless the interrupt mask. */
67 kADC_PositiveSaturationRawFlag = 1UL << 11UL, /*!< ADC data positive side saturation raw flag, this flag will
68 be captured regardless the interrupt mask. */
69 kADC_FifoOverrunRawFlag = 1UL << 12UL, /*!< FIFO overrun raw flag, this flag will be captured
70 regardless the interrupt mask. */
71 kADC_FifoUnderrunRawFlag = 1UL << 13UL, /*!< FIFO underrun interrupt mask, this flag will be captured
72 regardless the interrupt mask. */
73
74 kADC_ActiveStatusFlag = 1UL << 14UL, /*!< ADC conversion active status flag. */
75 kADC_FIFONotEmptyStatusFlag = 1UL << 15UL, /*!< FIFO not empty status flag. */
76 kADC_FifoFullStatusFlag = 1UL << 16UL, /*!< FIFO full status flag. */
77 };
78
79 /*!
80 * @brief ADC clock divider ratio type
81 */
82 typedef enum _adc_clock_divider
83 {
84 kADC_ClockDivider1 = 0U, /*!< Clock divider ratio is 1 */
85 kADC_ClockDivider2 = 1U, /*!< Clock divider ratio is 2 */
86 kADC_ClockDivider3 = 2U, /*!< Clock divider ratio is 3 */
87 kADC_ClockDivider4 = 3U, /*!< Clock divider ratio is 4 */
88 kADC_ClockDivider5 = 4U, /*!< Clock divider ratio is 5 */
89 kADC_ClockDivider6 = 5U, /*!< Clock divider ratio is 6 */
90 kADC_ClockDivider7 = 6U, /*!< Clock divider ratio is 7 */
91 kADC_ClockDivider8 = 7U, /*!< Clock divider ratio is 8 */
92 kADC_ClockDivider9 = 8U, /*!< Clock divider ratio is 9 */
93 kADC_ClockDivider10 = 9U, /*!< Clock divider ratio is 10 */
94 kADC_ClockDivider11 = 10U, /*!< Clock divider ratio is 11 */
95 kADC_ClockDivider12 = 11U, /*!< Clock divider ratio is 12 */
96 kADC_ClockDivider13 = 12U, /*!< Clock divider ratio is 13 */
97 kADC_ClockDivider14 = 13U, /*!< Clock divider ratio is 14 */
98 kADC_ClockDivider15 = 14U, /*!< Clock divider ratio is 15 */
99 kADC_ClockDivider16 = 15U, /*!< Clock divider ratio is 16 */
100 kADC_ClockDivider17 = 16U, /*!< Clock divider ratio is 17 */
101 kADC_ClockDivider18 = 17U, /*!< Clock divider ratio is 18 */
102 kADC_ClockDivider19 = 18U, /*!< Clock divider ratio is 19 */
103 kADC_ClockDivider20 = 19U, /*!< Clock divider ratio is 20 */
104 kADC_ClockDivider21 = 20U, /*!< Clock divider ratio is 21 */
105 kADC_ClockDivider22 = 21U, /*!< Clock divider ratio is 22 */
106 kADC_ClockDivider23 = 22U, /*!< Clock divider ratio is 23 */
107 kADC_ClockDivider24 = 23U, /*!< Clock divider ratio is 24 */
108 kADC_ClockDivider25 = 24U, /*!< Clock divider ratio is 25 */
109 kADC_ClockDivider26 = 25U, /*!< Clock divider ratio is 26 */
110 kADC_ClockDivider27 = 26U, /*!< Clock divider ratio is 27 */
111 kADC_ClockDivider28 = 27U, /*!< Clock divider ratio is 28 */
112 kADC_ClockDivider29 = 28U, /*!< Clock divider ratio is 29 */
113 kADC_ClockDivider30 = 29U, /*!< Clock divider ratio is 30 */
114 kADC_ClockDivider31 = 30U, /*!< Clock divider ratio is 31 */
115 kADC_ClockDivider32 = 31U, /*!< Clock divider ratio is 32 */
116 } adc_clock_divider_t;
117
118 /*!
119 * @brief ADC analog portion low-power mode selection.
120 */
121 typedef enum _adc_analog_portion_power_mode
122 {
123 kADC_PowerModeFullBiasingCurrent = 0U, /*!< Full biasing current. */
124 kADC_PowerModeHalfBiasingCurrent, /*!< Half biasing current. */
125 } adc_analog_portion_power_mode_t;
126
127 /*!
128 * @brief ADC resolution type
129 */
130 typedef enum _adc_resolution
131 {
132 kADC_Resolution12Bit = 0U, /*!< 12-bit resolution */
133 kADC_Resolution14Bit = 1U, /*!< 14-bit resolution */
134 kADC_Resolution16Bit = 2U, /*!< 16-bit resolution */
135 kADC_Resolution16BitAudio = 3U, /*!< 16-bit resolution for audio application */
136 } adc_resolution_t;
137
138 /*!
139 * @brief The enumeration of adc warm up time, the ADC warm-up state can also bypassed.
140 */
141 typedef enum _adc_warm_up_time
142 {
143 kADC_WarmUpTime1us = 0U, /*!< ADC warm-up time is 1 us. */
144 kADC_WarmUpTime2us, /*!< ADC warm-up time is 2 us. */
145 kADC_WarmUpTime3us, /*!< ADC warm-up time is 3 us. */
146 kADC_WarmUpTime4us, /*!< ADC warm-up time is 4 us. */
147 kADC_WarmUpTime5us, /*!< ADC warm-up time is 5 us. */
148 kADC_WarmUpTime6us, /*!< ADC warm-up time is 6 us. */
149 kADC_WarmUpTime7us, /*!< ADC warm-up time is 7 us. */
150 kADC_WarmUpTime8us, /*!< ADC warm-up time is 8 us. */
151 kADC_WarmUpTime9us, /*!< ADC warm-up time is 9 us. */
152 kADC_WarmUpTime10us, /*!< ADC warm-up time is 10 us. */
153 kADC_WarmUpTime11us, /*!< ADC warm-up time is 11 us. */
154 kADC_WarmUpTime12us, /*!< ADC warm-up time is 12 us. */
155 kADC_WarmUpTime13us, /*!< ADC warm-up time is 13 us. */
156 kADC_WarmUpTime14us, /*!< ADC warm-up time is 14 us. */
157 kADC_WarmUpTime15us, /*!< ADC warm-up time is 15 us. */
158 kADC_WarmUpTime16us, /*!< ADC warm-up time is 16 us. */
159 kADC_WarmUpTime17us, /*!< ADC warm-up time is 17 us. */
160 kADC_WarmUpTime18us, /*!< ADC warm-up time is 18 us. */
161 kADC_WarmUpTime19us, /*!< ADC warm-up time is 19 us. */
162 kADC_WarmUpTime20us, /*!< ADC warm-up time is 20 us. */
163 kADC_WarmUpTime21us, /*!< ADC warm-up time is 21 us. */
164 kADC_WarmUpTime22us, /*!< ADC warm-up time is 22 us. */
165 kADC_WarmUpTime23us, /*!< ADC warm-up time is 23 us. */
166 kADC_WarmUpTime24us, /*!< ADC warm-up time is 24 us. */
167 kADC_WarmUpTime25us, /*!< ADC warm-up time is 25 us. */
168 kADC_WarmUpTime26us, /*!< ADC warm-up time is 26 us. */
169 kADC_WarmUpTime27us, /*!< ADC warm-up time is 27 us. */
170 kADC_WarmUpTime28us, /*!< ADC warm-up time is 28 us. */
171 kADC_WarmUpTime29us, /*!< ADC warm-up time is 29 us. */
172 kADC_WarmUpTime30us, /*!< ADC warm-up time is 30 us. */
173 kADC_WarmUpTime31us, /*!< ADC warm-up time is 31 us. */
174 kADC_WarmUpTime32us, /*!< ADC warm-up time is 32 us. */
175 kADC_WarmUpStateBypass = 0x20U, /*!< ADC warm-up state bypassed. */
176 } adc_warm_up_time_t;
177
178 /*!
179 * @brief ADC voltage reference source type
180 */
181 typedef enum _adc_vref_source
182 {
183 kADC_Vref1P8V = 0U, /*!< Internal 1.8V reference */
184 kADC_Vref1P2V = 1U, /*!< Internal 1.2V reference */
185 kADC_VrefExternal = 2U, /*!< External single-ended reference though ADC_CH3 */
186 kADC_VrefInternal1P2V = 3U, /*!< Internal 1.2V reference with cap filter though ADC_CH3 */
187 } adc_vref_source_t;
188
189 /*!
190 * @brief ADC input mode type
191 */
192 typedef enum _adc_input_mode
193 {
194 kADC_InputSingleEnded = 0U, /*!< Single-ended mode */
195 kADC_InputDifferential = 1U, /*!< Differential mode */
196 } adc_input_mode_t;
197
198 /*!
199 * @brief ADC conversion mode type
200 */
201 typedef enum _adc_conversion_mode
202 {
203 kADC_ConversionOneShot = 0U, /*!< One shot mode */
204 kADC_ConversionContinuous = 1U, /*!< Continuous mode */
205 } adc_conversion_mode_t;
206
207 /*!
208 * @brief ADC scan length type
209 */
210 typedef enum _adc_scan_length
211 {
212 kADC_ScanLength_1 = 0U, /*!< Scan length is 1 */
213 kADC_ScanLength_2 = 1U, /*!< Scan length is 2 */
214 kADC_ScanLength_3 = 2U, /*!< Scan length is 3 */
215 kADC_ScanLength_4 = 3U, /*!< Scan length is 4 */
216 kADC_ScanLength_5 = 4U, /*!< Scan length is 5 */
217 kADC_ScanLength_6 = 5U, /*!< Scan length is 6 */
218 kADC_ScanLength_7 = 6U, /*!< Scan length is 7 */
219 kADC_ScanLength_8 = 7U, /*!< Scan length is 8 */
220 kADC_ScanLength_9 = 8U, /*!< Scan length is 9 */
221 kADC_ScanLength_10 = 9U, /*!< Scan length is 10 */
222 kADC_ScanLength_11 = 10U, /*!< Scan length is 11 */
223 kADC_ScanLength_12 = 11U, /*!< Scan length is 12 */
224 kADC_ScanLength_13 = 12U, /*!< Scan length is 13 */
225 kADC_ScanLength_14 = 13U, /*!< Scan length is 14 */
226 kADC_ScanLength_15 = 14U, /*!< Scan length is 15 */
227 kADC_ScanLength_16 = 15U, /*!< Scan length is 16 */
228 } adc_scan_length_t;
229
230 /*!
231 * @brief ADC average length type
232 */
233 typedef enum _adc_average_length
234 {
235 kADC_AverageNone = 0U, /*!< Average length: no average */
236 kADC_Average2 = 1U, /*!< Average length: 2 */
237 kADC_Average4 = 2U, /*!< Average length: 4 */
238 kADC_Average8 = 3U, /*!< Average length: 8 */
239 kADC_Average16 = 4U, /*!< Average length: 16 */
240 } adc_average_length_t;
241
242 /*!
243 * @brief ADC input buffer gain type
244 */
245 typedef enum _adc_input_gain
246 {
247 kADC_InputGain0P5 = 0U, /*!< Input buffer gain is 0.5 */
248 kADC_InputGain1 = 1U, /*!< Input buffer gain is 1 */
249 kADC_InputGain2 = 2U, /*!< Input buffer gain is 2 */
250 } adc_input_gain_t;
251
252 /*!
253 * @brief ADC result width type
254 */
255 typedef enum _adc_result_width
256 {
257 kADC_ResultWidth16 = 0U, /*!< 16-bit final result buffer width */
258 kADC_ResultWidth32 = 1U, /*!< 32-bit final result buffer width */
259 } adc_result_width_t;
260
261 /*!
262 * @brief The threshold of FIFO.
263 */
264 typedef enum _adc_fifo_threshold
265 {
266 kADC_FifoThresholdData1 = 0U, /*!< FIFO Threshold is 1 data. */
267 kADC_FifoThresholdData4, /*!< FIFO Threshold is 4 data. */
268 kADC_FifoThresholdData8, /*!< FIFO Threshold is 8 data. */
269 kADC_FifoThresholdData16, /*!< FIFO Threshold is 16 data. */
270 } adc_fifo_threshold_t;
271
272 /*!
273 * @brief ADC calibration voltage reference type
274 */
275 typedef enum _adc_calibration_ref
276 {
277 kADC_CalibrationVrefInternal = 0, /*!< Internal vref as input for calibration */
278 kADC_CalibrationVrefExternal = 1, /*!< External vref as input for calibration */
279 } adc_calibration_ref_t;
280
281 /*!
282 * @brief ADC scan channel type
283 */
284 typedef enum _adc_scan_channel
285 {
286 kADC_ScanChannel0 = 0U, /*!< Scan channel 0 */
287 kADC_ScanChannel1 = 1U, /*!< Scan channel 1 */
288 kADC_ScanChannel2 = 2U, /*!< Scan channel 2 */
289 kADC_ScanChannel3 = 3U, /*!< Scan channel 3 */
290 kADC_ScanChannel4 = 4U, /*!< Scan channel 4 */
291 kADC_ScanChannel5 = 5U, /*!< Scan channel 5 */
292 kADC_ScanChannel6 = 6U, /*!< Scan channel 6 */
293 kADC_ScanChannel7 = 7U, /*!< Scan channel 7 */
294 kADC_ScanChannel8 = 8U, /*!< Scan channel 8 */
295 kADC_ScanChannel9 = 9U, /*!< Scan channel 9 */
296 kADC_ScanChannel10 = 10U, /*!< Scan channel 10 */
297 kADC_ScanChannel11 = 11U, /*!< Scan channel 11 */
298 kADC_ScanChannel12 = 12U, /*!< Scan channel 12 */
299 kADC_ScanChannel13 = 13U, /*!< Scan channel 13 */
300 kADC_ScanChannel14 = 14U, /*!< Scan channel 14 */
301 kADC_ScanChannel15 = 15U, /*!< Scan channel 15 */
302 } adc_scan_channel_t;
303
304 /*!
305 * @brief ADC channel source type
306 */
307 typedef enum _adc_channel_source
308 {
309 kADC_CH0 = 0U, /*!< Single-ended mode, channel[0] and vssa */
310 kADC_CH1 = 1U, /*!< Single-ended mode, channel[1] and vssa */
311 kADC_CH2 = 2U, /*!< Single-ended mode, channel[2] and vssa */
312 kADC_CH3 = 3U, /*!< Single-ended mode, channel[3] and vssa */
313 kADC_CH4 = 4U, /*!< Single-ended mode, channel[4] and vssa */
314 kADC_CH5 = 5U, /*!< Single-ended mode, channel[5] and vssa */
315 kADC_CH6 = 6U, /*!< Single-ended mode, channel[6] and vssa */
316 kADC_CH7 = 7U, /*!< Single-ended mode, channel[7] and vssa */
317 kADC_VBATS = 8U, /*!< Single-ended mode, vbat_s and vssa */
318 kADC_VREF = 9U, /*!< Single-ended mode, vref_12 and vssa */
319 kADC_DACA = 10U, /*!< Single-ended mode, daca and vssa */
320 kADC_DACB = 11U, /*!< Single-ended mode, dacb and vssa */
321 kADC_VSSA = 12U, /*!< Single-ended mode, vssa and vssa */
322
323 #if !(defined(FSL_FEATURE_ADC_HAS_NO_SINGLEEND_TEMP_CHANNEL) && FSL_FEATURE_ADC_HAS_NO_SINGLEEND_TEMP_CHANNEL)
324 kADC_TEMPP = 15U, /*!< Single-ended mode, temp_p and vssa */
325 #endif /* FSL_FEATURE_ADC_HAS_NO_SINGLEEND_TEMP_CHANNEL */
326
327 kADC_CH0_CH1 = 0U, /*!< Differential mode, channel[0] and channel[1] */
328 kADC_CH2_CH3 = 1U, /*!< Differential mode, channel[2] and channel[3] */
329 kADC_CH4_CH5 = 2U, /*!< Differential mode, channel[4] and channel[5] */
330 kADC_CH6_CH7 = 3U, /*!< Differential mode, channel[6] and channel[7] */
331 kADC_DACA_DACB = 4U, /*!< Differential mode, daca and dacb */
332
333 #if !(defined(FSL_FEATURE_ADC_HAS_NO_DIFFERENTIAL_VOICE_CHANNEL) && FSL_FEATURE_ADC_HAS_NO_DIFFERENTIAL_VOICE_CHANNEL)
334 kADC_VOICEP_VOICEN = 5U, /*!< Differential mode, voice_p and voice_n */
335 #endif /* FSL_FEATURE_ADC_HAS_NO_DIFFERENTIAL_VOICE_CHANNEL */
336
337 #if !(defined(FSL_FEATURE_ADC_HAS_NO_DIFFERENTIAL_TEMP_CHANNEL) && FSL_FEATURE_ADC_HAS_NO_DIFFERENTIAL_TEMP_CHANNEL)
338 kADC_TEMPP_TEMPN = 15U, /*!< Differential mode, temp_p and temp_n */
339 #endif /* FSL_FEATURE_ADC_HAS_NO_DIFFERENTIAL_TEMP_CHANNEL */
340 } adc_channel_source_t;
341
342 /*!
343 * @brief Temperature sensor mode, including internal diode mode and external diode mode.
344 */
345 typedef enum _adc_temperature_sensor_mode
346 {
347 #if ((!(defined(FSL_FEATURE_ADC_HAS_NO_SINGLEEND_TEMP_CHANNEL) && FSL_FEATURE_ADC_HAS_NO_SINGLEEND_TEMP_CHANNEL)) || \
348 (!(defined(FSL_FEATURE_ADC_HAS_NO_DIFFERENTIAL_TEMP_CHANNEL) && \
349 FSL_FEATURE_ADC_HAS_NO_DIFFERENTIAL_TEMP_CHANNEL)))
350 kADC_TSensorInternal = 0U, /*!< Internal diode mode. */
351 #endif /* No temperature measurement channel available. */
352 kADC_TSensorExternal, /*!< External diode mode. */
353 } adc_temperature_sensor_mode_t;
354
355 /*!
356 * @brief ADC audio pga gain type
357 */
358 typedef enum _adc_audio_pga_voltage_gain
359 {
360 kADC_AudioGain4 = 0U, /*!< Audio pga gain is 4 */
361 kADC_AudioGain8 = 1U, /*!< Audio pga gain is 8 */
362 kADC_AudioGain16 = 2U, /*!< Audio pga gain is 16 */
363 kADC_AudioGain32 = 3U, /*!< Audio pga gain is 32 */
364 } adc_audio_pga_voltage_gain_t;
365
366 /*!
367 * @brief ADC audio voice level selection.
368 */
369 typedef enum _adc_audio_voice_level
370 {
371 kADC_VoiceLevel0 = 0U, /*!< Input voice level >+255LSB or <-256LSB */
372 kADC_VoiceLevel1 = 1U, /*!< Input voice level >+511LSB or <-512LSB */
373 kADC_VoiceLevel2 = 2U, /*!< Input voice level >+1023LSB or <-1024LSB */
374 kADC_VoiceLevel3 = 3U, /*!< Input voice level >+2047LSB or <-2048LSB */
375 } adc_audio_voice_level_t;
376
377 /*!
378 * @brief The structure of adc options, including clock divider, power mode, and so on.
379 */
380 typedef struct _adc_config
381 {
382 /* ADC module basic options */
383 adc_clock_divider_t clockDivider : 5U; /*!< Analog 64M clock division ratio,
384 please refer to @ref adc_clock_divider_t. */
385 adc_analog_portion_power_mode_t powerMode : 1U;
386 adc_resolution_t resolution : 2U; /*!< Configure ADC resolution, please refer to
387 @ref adc_resolution_t. */
388 adc_warm_up_time_t warmupTime : 6U; /*!< Configure warm-up time. */
389
390 /* ADC conversion related options. */
391 adc_vref_source_t vrefSource : 2U; /*!< Configure voltage reference source,
392 please refer to @ref adc_vref_source_t. */
393 adc_input_mode_t inputMode : 1U; /*!< Configure input mode, such as #kADC_InputSingleEnded
394 or #kADC_InputDifferential. */
395 adc_conversion_mode_t conversionMode : 1U; /*!< Configure convrsion mode, such as
396 #kADC_ConversionOneShot or #kADC_ConversionContinuous. */
397 adc_scan_length_t scanLength : 4U; /*!< Configure the length of scan, please refer to
398 @ref adc_scan_length_t. */
399 adc_average_length_t averageLength : 3U; /*!< Configure hardware average number, please refer to
400 @ref adc_average_length_t */
401 adc_trigger_source_t triggerSource : 3U; /*!< Configure trigger source, the trigger source can be
402 divided into hardware trigger and software trigger,
403 please refer to @ref adc_trigger_source_t for details. */
404 adc_input_gain_t inputGain : 2U; /*!< Configure ADC input buffer gain, please refer to
405 @ref adc_input_gain_t. */
406 bool enableInputGainBuffer : 1U; /*!< Enable/Disable input gain buffer.
407 - \b true Enable input gain buffer.
408 - \b false Disable input gain buffer. */
409 bool enableInputBufferChop : 1U; /*!< Enable/Disable input buffer chopper:
410 - \b true Enable input buffer chopper;
411 - \b false Disable input buffer chopper. */
412
413 bool enableChop : 1U; /*!< Enable/Disable the ADC chopper:
414 - \b true Enable the chopper;
415 - \b false Disable the chopper. */
416
417 /* ADC conversion result related options. */
418 adc_result_width_t resultWidth : 1U; /*!< Select result FIFO data packed format, please
419 refer to @ref adc_result_width_t. */
420 adc_fifo_threshold_t fifoThreshold : 2U; /*!< Configure FIFO threshold, please refer to
421 @ref adc_fifo_threshold_t. */
422 bool enableDMA : 1U; /*!< Enable/Disable DMA reqeust.
423 - \b true Enable DMA request.
424 - \b false Disable DMA request. */
425 bool enableADC : 1U; /*!< Enable/Disable ADC module.
426 - \b true Enable ADC module.
427 - \b false Disable ADC module. */
428 } adc_config_t;
429
430 /*******************************************************************************
431 * API
432 ******************************************************************************/
433 #if defined(__cplusplus)
434 extern "C" {
435 #endif
436
437 /*!
438 * @name ADC Basic Control Interfaces
439 * @{
440 */
441
442 /*!
443 * @brief Initialize ADC module, including clock divider, power mode, and so on.
444 *
445 * @param base ADC peripheral base address.
446 * @param config The pointer to the structure @ref adc_config_t.
447 */
448 void ADC_Init(ADC_Type *base, const adc_config_t *config);
449
450 /*!
451 * @brief Get default configuration.
452 *
453 * @code
454 * config->clockDivider = kADC_ClockDivider1;
455 * config->powerMode = kADC_PowerModeFullBiasingCurrent;
456 * config->resolution = kADC_Resolution12Bit;
457 * config->warmupTime = kADC_WarmUpTime16us;
458 * config->vrefSource = kADC_Vref1P2V;
459 * config->inputMode = kADC_InputSingleEnded;
460 * config->conversionMode = kADC_ConversionContinuous;
461 * config->scanLength = kADC_ScanLength_1;
462 * config->averageLength = kADC_AverageNone;
463 * config->triggerSource = kADC_TriggerSourceSoftware;
464 * config->inputGain = kADC_InputGain1;
465 * config->enableInputGainBuffer = false;
466 * config->resultWidth = kADC_ResultWidth16;
467 * config->fifoThreshold = kADC_FifoThresholdData1;
468 * config->enableDMA = false;
469 * config->enableADC = false;
470 * @endcode
471 *
472 * @param config The Pointer to the structure @ref adc_config_t.
473 */
474 void ADC_GetDefaultConfig(adc_config_t *config);
475
476 /*!
477 * @brief De-initialize the ADC module.
478 *
479 * @param base ADC peripheral base address.
480 */
481 void ADC_Deinit(ADC_Type *base);
482
483 /*!
484 * @brief Reset the whole ADC block.
485 *
486 * @param base ADC peripheral base address.
487 */
ADC_DoSoftwareReset(ADC_Type * base)488 static inline void ADC_DoSoftwareReset(ADC_Type *base)
489 {
490 base->ADC_REG_CMD |= ADC_ADC_REG_CMD_SOFT_RST_MASK;
491
492 for (uint8_t i = 0U; i < 10U; i++)
493 {
494 __NOP();
495 }
496 base->ADC_REG_CMD &= ~ADC_ADC_REG_CMD_SOFT_RST_MASK;
497 }
498
499 /*!
500 * @brief Select ADC analog portion power mode.
501 *
502 * @param base ADC peripheral base address.
503 * @param powerMode The power mode to be set, please refer to @ref adc_analog_portion_power_mode_t.
504 */
ADC_SelectAnalogPortionPowerMode(ADC_Type * base,adc_analog_portion_power_mode_t powerMode)505 static inline void ADC_SelectAnalogPortionPowerMode(ADC_Type *base, adc_analog_portion_power_mode_t powerMode)
506 {
507 base->ADC_REG_ANA = (base->ADC_REG_ANA & (~ADC_ADC_REG_ANA_BIAS_SEL_MASK)) | ADC_ADC_REG_ANA_BIAS_SEL(powerMode);
508 }
509
510 /*! @} */
511
512 /*!
513 * @name ADC Calibration Control Interfaces
514 * @{
515 */
516
517 /*!
518 * @brief Do automatic calibration measurement.
519 *
520 * @note After auto calibrate successful, user can invoke ADC_GetAutoCalibrationData() to get self offset calibration
521 * value and self gain calibration value.
522 *
523 * @param base ADC peripheral base address.
524 * @param calVref The inpul reference channel for gain calibration,
525 * please refer to @ref adc_calibration_ref_t for details.
526 * @retval #kStatus_Success Auto calibrate successfully.
527 * @retval #kStatus_Fail Auto calibrate failure.
528 */
529 status_t ADC_DoAutoCalibration(ADC_Type *base, adc_calibration_ref_t calVref);
530
531 /*!
532 * @brief Get the ADC automatic calibration data.
533 *
534 * @param base ADC peripheral base address.
535 * @param offsetCal Self offset calibration data pointer, evaluate NULL if not requried.
536 * @param gainCal Self gain calibration data pointer, evaluate NULL if not requried.
537 */
ADC_GetAutoCalibrationData(ADC_Type * base,uint16_t * offsetCal,uint16_t * gainCal)538 static inline void ADC_GetAutoCalibrationData(ADC_Type *base, uint16_t *offsetCal, uint16_t *gainCal)
539 {
540 if (offsetCal != NULL)
541 {
542 *offsetCal = (uint16_t)(base->ADC_REG_OFFSET_CAL & ADC_ADC_REG_OFFSET_CAL_OFFSET_CAL_MASK);
543 }
544
545 if (gainCal != NULL)
546 {
547 *gainCal = (uint16_t)(base->ADC_REG_GAIN_CAL & ADC_ADC_REG_GAIN_CAL_GAIN_CAL_MASK);
548 }
549 }
550
551 /*!
552 * @brief Reset the automatic calibration data.
553 *
554 * @param base ADC peripheral base address.
555 */
ADC_ResetAutoCalibrationData(ADC_Type * base)556 static inline void ADC_ResetAutoCalibrationData(ADC_Type *base)
557 {
558 base->ADC_REG_CONFIG |= ADC_ADC_REG_CONFIG_CAL_DATA_RST_MASK;
559 for (uint8_t i = 0U; i < 10U; i++)
560 {
561 __NOP();
562 }
563 base->ADC_REG_CONFIG &= ~ADC_ADC_REG_CONFIG_CAL_DATA_RST_MASK;
564 }
565
566 /*!
567 * @brief Do user defined calibration.
568 *
569 * @param base ADC peripheral base address.
570 * @param offsetCal User defined offset calibration data.
571 * @param gainCal User defined gain calibration date.
572 */
ADC_DoUserCalibration(ADC_Type * base,uint16_t offsetCal,uint16_t gainCal)573 static inline void ADC_DoUserCalibration(ADC_Type *base, uint16_t offsetCal, uint16_t gainCal)
574 {
575 /* Load user defined offset and gain calibration data */
576 base->ADC_REG_OFFSET_CAL = (base->ADC_REG_OFFSET_CAL & ~(ADC_ADC_REG_OFFSET_CAL_OFFSET_CAL_USR_MASK)) |
577 ADC_ADC_REG_OFFSET_CAL_OFFSET_CAL_USR(offsetCal);
578 base->ADC_REG_GAIN_CAL = (base->ADC_REG_GAIN_CAL & ~(ADC_ADC_REG_GAIN_CAL_GAIN_CAL_USR_MASK)) |
579 ADC_ADC_REG_GAIN_CAL_GAIN_CAL_USR(gainCal);
580
581 /* Use user defined calibration data */
582 base->ADC_REG_CONFIG |= ADC_ADC_REG_CONFIG_CAL_DATA_SEL_MASK;
583 }
584
585 /*! @} */
586
587 /*!
588 * @name ADC Temperature Sensor Control Interfaces
589 * @{
590 */
591
592 /*!
593 * @brief Enable/disable temperature sensor.
594 *
595 * @note This function is useful only when the channel source is temperature sensor.
596 *
597 * @param base ADC peripheral base address.
598 * @param enable Used to enable/disable temperature sensor.
599 * - \b true Enable temperature sensor.
600 * - \b false Disable temperature sensor.
601 */
ADC_EnableTemperatureSensor(ADC_Type * base,bool enable)602 static inline void ADC_EnableTemperatureSensor(ADC_Type *base, bool enable)
603 {
604 if (enable)
605 {
606 base->ADC_REG_ANA |= ADC_ADC_REG_ANA_TS_EN_MASK;
607 }
608 else
609 {
610 base->ADC_REG_ANA &= ~ADC_ADC_REG_ANA_TS_EN_MASK;
611 }
612 }
613
614 /*!
615 * @brief Set temperature sensor mode, available selections are internal diode mode and external diode mode.
616 *
617 * @param base ADC peripheral base address.
618 * @param tSensorMode The temperature sensor mode to be set, please refer to @ref adc_temperature_sensor_mode_t.
619 */
ADC_SetTemperatureSensorMode(ADC_Type * base,adc_temperature_sensor_mode_t tSensorMode)620 static inline void ADC_SetTemperatureSensorMode(ADC_Type *base, adc_temperature_sensor_mode_t tSensorMode)
621 {
622 base->ADC_REG_ANA =
623 (base->ADC_REG_ANA & ~(ADC_ADC_REG_ANA_TSEXT_SEL_MASK)) | ADC_ADC_REG_ANA_TSEXT_SEL(tSensorMode);
624 }
625
626 /*! @} */
627
628 /*!
629 * @name ADC Audio Control Interfaces
630 * @{
631 */
632
633 /*!
634 * @brief Enable/disable audio PGA and decimation rate select.
635 *
636 * @param base ADC peripheral base address.
637 * @param enable Used to enable/disable audio PGA and decimation rate select.
638 * - \b true Enable audio PGA and decimation rate select.
639 * - \b false Disable audio PGA and decimation rate select.
640 */
ADC_EnableAudio(ADC_Type * base,bool enable)641 static inline void ADC_EnableAudio(ADC_Type *base, bool enable)
642 {
643 if (enable)
644 {
645 base->ADC_REG_AUDIO |= ADC_ADC_REG_AUDIO_EN_MASK;
646 }
647 else
648 {
649 base->ADC_REG_AUDIO &= ~ADC_ADC_REG_AUDIO_EN_MASK;
650 }
651 }
652
653 /*!
654 * @brief Set audio PGA voltage gain.
655 *
656 * @param base ADC peripheral base address.
657 * @param voltageGain The selected audio PGA voltage gain, please refer to @ref adc_audio_pga_voltage_gain_t.
658 */
ADC_SetAudioPGAVoltageGain(ADC_Type * base,adc_audio_pga_voltage_gain_t voltageGain)659 static inline void ADC_SetAudioPGAVoltageGain(ADC_Type *base, adc_audio_pga_voltage_gain_t voltageGain)
660 {
661 base->ADC_REG_AUDIO =
662 (base->ADC_REG_AUDIO & (~ADC_ADC_REG_AUDIO_PGA_GAIN_MASK)) | ADC_ADC_REG_AUDIO_PGA_GAIN(voltageGain);
663 }
664
665 /*!
666 * @brief Configure audio voice level.
667 *
668 * @param base ADC peripheral base address.
669 * @param enableDetect Used to enable/disable voice level detection.
670 * - \b true Enable voice level detection.
671 * - \b false Disable voice level detection.
672 * @param voiceLevel Selected voice level, please refer to @ref adc_audio_voice_level_t.
673 */
674 void ADC_ConfigAudioVoiceLevel(ADC_Type *base, bool enableDetect, adc_audio_voice_level_t voiceLevel);
675
676 /*! @} */
677
678 /*!
679 * @name ADC Conversion Related Interfaces
680 * @{
681 */
682
683 /*!
684 * @brief Set scan channel mux source.
685 *
686 * @param base ADC peripheral base address.
687 * @param scanChannel The selected channel, please refer to @ref adc_scan_channel_t for details.
688 * @param channelSource The mux source to be set to the selected channel,
689 * please refer to @ref adc_channel_source_t for details.
690 */
691 void ADC_SetScanChannel(ADC_Type *base, adc_scan_channel_t scanChannel, adc_channel_source_t channelSource);
692
693 /*!
694 * @brief If trigger mode is selected as software trigger, invoking this function to start conversion.
695 *
696 * @note This API will also clear the FIFO.
697 *
698 * @param base ADC peripheral base address.
699 */
ADC_DoSoftwareTrigger(ADC_Type * base)700 static inline void ADC_DoSoftwareTrigger(ADC_Type *base)
701 {
702 base->ADC_REG_CMD |= ADC_ADC_REG_CMD_CONV_START_MASK;
703 }
704
705 /*!
706 * @brief Invoke this function to stop conversion.
707 *
708 * @param base ADC peripheral base address.
709 */
ADC_StopConversion(ADC_Type * base)710 static inline void ADC_StopConversion(ADC_Type *base)
711 {
712 base->ADC_REG_CMD &= ~ADC_ADC_REG_CMD_CONV_START_MASK;
713 }
714
715 /*!
716 * @brief Get the 32-bit width packed ADC conversion result.
717 *
718 * @param base ADC peripheral base address.
719 * @return 32-bit width packed ADC conversion result.
720 */
ADC_GetConversionResult(ADC_Type * base)721 static inline uint32_t ADC_GetConversionResult(ADC_Type *base)
722 {
723 return (uint32_t)(base->ADC_REG_RESULT);
724 }
725
726 /*!
727 * @brief Get the ADC FIFO data count.
728 *
729 * @param base ADC peripheral base address.
730 * @return ADC FIFO data count.
731 */
ADC_GetFifoDataCount(ADC_Type * base)732 static inline uint8_t ADC_GetFifoDataCount(ADC_Type *base)
733 {
734 return (uint8_t)((base->ADC_REG_STATUS & ADC_ADC_REG_STATUS_FIFO_DATA_COUNT_MASK) >>
735 ADC_ADC_REG_STATUS_FIFO_DATA_COUNT_SHIFT);
736 }
737
738 /*! @} */
739
740 /*!
741 * @name ADC Interrupt Control Interfaces
742 * @{
743 */
744
745 /*!
746 * @brief Enable interrupts, such as conversion data ready interrupt, gain correction saturation interrupt, FIFO
747 * under run interrupt, and so on.
748 *
749 * @param base ADC peripheral base address.
750 * @param interruptMask The interrupts to be enabled, should be the OR'ed value of @ref _adc_interrupt_enable.
751 */
ADC_EnableInterrupts(ADC_Type * base,uint32_t interruptMask)752 static inline void ADC_EnableInterrupts(ADC_Type *base, uint32_t interruptMask)
753 {
754 base->ADC_REG_IMR &= ~(interruptMask);
755 }
756
757 /*!
758 * @brief Disable interrupts, such as conversion data ready interrupt, gain correction saturation interrupt, FIFO
759 * under run interrupt, and so on.
760 *
761 * @param base ADC peripheral base address.
762 * @param interruptMask The interrupts to be disabled, should be the OR'ed value of @ref _adc_interrupt_enable.
763 */
ADC_DisableInterrupts(ADC_Type * base,uint32_t interruptMask)764 static inline void ADC_DisableInterrupts(ADC_Type *base, uint32_t interruptMask)
765 {
766 base->ADC_REG_IMR |= interruptMask;
767 }
768
769 /*! @} */
770
771 /*!
772 * @name ADC Status Control Interfaces
773 * @{
774 */
775
776 /*!
777 * @brief Get status flags, including interrupt flags, raw flags, and so on.
778 *
779 * @param base ADC peripheral base address.
780 * @return The OR'ed value of ADC status flags, please refer to @ref _adc_status_flags for details.
781 */
782 uint32_t ADC_GetStatusFlags(ADC_Type *base);
783
784 /*!
785 * @brief Clear status flags.
786 *
787 * @note Only interrupt flags and raw flags can be cleared.
788 *
789 * @param base ADC peripheral base address.
790 * @param statusFlagsMask The OR'ed value of status flags to be cleared,
791 * please refer to @ref _adc_status_flags for details.
792 */
ADC_ClearStatusFlags(ADC_Type * base,uint32_t statusFlagsMask)793 static inline void ADC_ClearStatusFlags(ADC_Type *base, uint32_t statusFlagsMask)
794 {
795 base->ADC_REG_ICR = (statusFlagsMask & 0x7FUL) | ((statusFlagsMask >> 7UL) & 0x7FUL);
796 }
797
798 /*! @} */
799
800 #if defined(__cplusplus)
801 }
802 #endif
803
804 /*! @} */
805
806 #endif /* FSL_ADC_H_ */
807
