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Searched refs:ADC_GC_ADACKEN_MASK (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/adc_12b1msps_sar/
Dfsl_adc.c97 tmp32 = base->GC & ~(ADC_GC_ADCO_MASK | ADC_GC_ADACKEN_MASK); in ADC_Init()
104 tmp32 |= ADC_GC_ADACKEN_MASK; in ADC_Init()
/hal_nxp-latest/imx/drivers/
Dadc_imx6sx.c238 ADC_GC_REG(base) |= ADC_GC_ADACKEN_MASK; in ADC_SetAsynClockOutput()
240 ADC_GC_REG(base) &= ~ADC_GC_ADACKEN_MASK; in ADC_SetAsynClockOutput()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h773 #define ADC_GC_ADACKEN_MASK (0x1U) macro
779 … (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h1127 #define ADC_GC_ADACKEN_MASK (0x1U) macro
1133 … (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h1270 #define ADC_GC_ADACKEN_MASK (0x1U) macro
1276 … (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h1290 #define ADC_GC_ADACKEN_MASK (0x1U) macro
1296 … (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h1501 #define ADC_GC_ADACKEN_MASK (0x1U) macro
1507 … (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h1480 #define ADC_GC_ADACKEN_MASK (0x1U) macro
1486 … (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h1504 #define ADC_GC_ADACKEN_MASK (0x1U) macro
1510 … (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h1482 #define ADC_GC_ADACKEN_MASK (0x1U) macro
1488 … (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h1557 #define ADC_GC_ADACKEN_MASK (0x1U) macro
1563 … (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h1639 #define ADC_GC_ADACKEN_MASK (0x1U) macro
1645 … (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h1561 #define ADC_GC_ADACKEN_MASK (0x1U) macro
1567 … (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h408 #define ADC_GC_ADACKEN_MASK 0x1u macro