| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/ |
| D | MIMXRT1011.h | 1420 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 1426 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/ |
| D | MIMXRT1015.h | 1710 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 1716 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/ |
| D | MIMXRT1024.h | 1857 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 1863 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/ |
| D | MIMXRT1021.h | 1877 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 1883 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/ |
| D | MIMXRT1051.h | 2120 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 2126 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/ |
| D | MIMXRT1041.h | 2099 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 2105 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/ |
| D | MIMXRT1052.h | 2123 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 2129 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/ |
| D | MIMXRT1042.h | 2101 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 2107 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/ |
| D | MIMXRT1061.h | 2176 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 2182 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/ |
| D | MIMXRT1064.h | 2258 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 2264 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/ |
| D | MIMXRT1062.h | 2180 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 2186 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/ |
| D | MIMXRT1175_cm4.h | 3591 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 3597 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| D | MIMXRT1175_cm7.h | 3594 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 3600 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/ |
| D | MIMXRT1165_cm7.h | 3585 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 3591 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| D | MIMXRT1165_cm4.h | 3582 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 3588 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/ |
| D | MIMXRT1171.h | 3594 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 3600 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/ |
| D | MIMXRT1166_cm4.h | 3597 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 3603 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| D | MIMXRT1166_cm7.h | 3600 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 3606 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/ |
| D | MIMXRT1173_cm4.h | 3603 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 3609 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| D | MIMXRT1173_cm7.h | 3606 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 3612 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/ |
| D | MIMXRT1172.h | 3609 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 3615 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/ |
| D | MIMXRT1176_cm7.h | 3611 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 3617 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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| D | MIMXRT1176_cm4.h | 3608 #define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK (0x80000U) macro 3614 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
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