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Searched refs:ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (Results 1 – 23 of 23) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h1396 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
1402 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h1686 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
1692 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h1833 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
1839 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h1853 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
1859 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h2096 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
2102 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h2075 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
2081 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h2099 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
2105 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h2077 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
2083 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h2152 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
2158 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h2234 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
2240 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h2156 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
2162 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h3567 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
3573 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
DMIMXRT1175_cm7.h3570 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
3576 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h3561 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
3567 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
DMIMXRT1165_cm4.h3558 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
3564 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h3570 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
3576 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h3573 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
3579 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
DMIMXRT1166_cm7.h3576 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
3582 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h3579 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
3585 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
DMIMXRT1173_cm7.h3582 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
3588 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h3585 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
3591 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h3587 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
3593 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
DMIMXRT1176_cm4.h3584 #define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK (0x10000U) macro
3590 …(uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)