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Searched refs:ADC_CLP4_CLP4_MASK (Results 1 – 25 of 56) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC041/
DMCXC041.h526 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
528 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/
DMKL17Z644.h646 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
648 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/
DMCXC141.h694 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
697 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/
DMCXC142.h692 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
695 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h510 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
512 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC242/
DMCXC242.h694 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
697 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL27Z644/
DMKL27Z644.h655 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
657 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/
DMCXC144.h665 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
668 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/
DMCXC143.h665 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
668 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h714 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
716 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/
DMCXC243.h663 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
666 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/
DMCXC244.h665 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
668 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h714 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
716 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h628 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
630 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h727 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
729 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h619 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
621 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h908 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
912 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h619 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
621 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h729 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
731 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h729 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
731 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h729 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
731 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B21A/
DK32L2B21A.h640 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
644 #define ADC_CLP4_CLP4(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B31A/
DK32L2B31A.h640 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
644 #define ADC_CLP4_CLP4(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B11A/
DK32L2B11A.h640 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
644 #define ADC_CLP4_CLP4(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC444/
DMCXC444.h665 #define ADC_CLP4_CLP4_MASK (0x3FFU) macro
668 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP4_CLP4_SHIFT)) & ADC_CLP4_CLP4_MASK)

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