Searched refs:ADC_CH_D_CFG1_REG (Results 1 – 2 of 2) sorted by relevance
89 ADC_CH_D_CFG1_REG(base) = 0x0; in ADC_Deinit()227 ADC_CH_D_CFG1_REG(base) = 0x0; in ADC_LogicChDeinit()263 ADC_CH_D_CFG1_REG(base) = (ADC_CH_D_CFG1_REG(base) & ~ADC_CH_D_CFG1_CHD_SEL_MASK) | \ in ADC_SelectInputCh()307 ADC_CH_D_CFG1_REG(base) = (ADC_CH_D_CFG1_REG(base) & ~ADC_CH_D_CFG1_CHD_TIMER_MASK) | \ in ADC_SetConvertRate()340 ADC_CH_D_CFG1_REG(base) |= ADC_CH_D_CFG1_CHD_AVG_EN_MASK; in ADC_SetAverageCmd()363 ADC_CH_D_CFG1_REG(base) &= ~ADC_CH_D_CFG1_CHD_AVG_EN_MASK; in ADC_SetAverageCmd()442 … ADC_CH_D_CFG1_REG(base) = (ADC_CH_D_CFG1_REG(base) & ~ADC_CH_D_CFG1_CHD_SINGLE_MASK) | in ADC_SetConvertCmd()463 ADC_CH_D_CFG1_REG(base) &= ~ADC_CH_D_CFG1_CHD_EN_MASK; in ADC_SetConvertCmd()493 ADC_CH_D_CFG1_REG(base) |= ADC_CH_D_CFG1_CHD_SINGLE_MASK | ADC_CH_D_CFG1_CHD_EN_MASK; in ADC_TriggerSingleConvert()525 ADC_CH_D_CFG1_REG(base) &= ~ADC_CH_D_CFG1_CHD_EN_MASK; in ADC_StopConvert()
368 #define ADC_CH_D_CFG1_REG(base) ((base)->CH_D_CFG1) macro737 #define ADC1_CH_D_CFG1 ADC_CH_D_CFG1_REG(ADC1_BASE_PTR)758 #define ADC2_CH_D_CFG1 ADC_CH_D_CFG1_REG(ADC2_BASE_PTR)
