Home
last modified time | relevance | path

Searched refs:ADC_CFG_AVGS_MASK (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/adc_12b1msps_sar/
Dfsl_adc.c75 tmp32 = base->CFG & (ADC_CFG_AVGS_MASK | ADC_CFG_ADTRG_MASK); /* Reserve AVGS and ADTRG bits. */ in ADC_Init()
369 tmp32 = base->CFG & ~ADC_CFG_AVGS_MASK; in ADC_SetHardwareAverageConfig()
/hal_nxp-latest/imx/drivers/
Dadc_imx6sx.c329 ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_AVGS_MASK)) | in ADC_SetAverageNum()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h751 #define ADC_CFG_AVGS_MASK (0xC000U) macro
759 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h1105 #define ADC_CFG_AVGS_MASK (0xC000U) macro
1113 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h1248 #define ADC_CFG_AVGS_MASK (0xC000U) macro
1256 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h1268 #define ADC_CFG_AVGS_MASK (0xC000U) macro
1276 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h1479 #define ADC_CFG_AVGS_MASK (0xC000U) macro
1487 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h1458 #define ADC_CFG_AVGS_MASK (0xC000U) macro
1466 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h1482 #define ADC_CFG_AVGS_MASK (0xC000U) macro
1490 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h1460 #define ADC_CFG_AVGS_MASK (0xC000U) macro
1468 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h1535 #define ADC_CFG_AVGS_MASK (0xC000U) macro
1543 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h1617 #define ADC_CFG_AVGS_MASK (0xC000U) macro
1625 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h1539 #define ADC_CFG_AVGS_MASK (0xC000U) macro
1547 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h402 #define ADC_CFG_AVGS_MASK 0xC000u macro
404 …S(x) (((uint32_t)(((uint32_t)(x))<<ADC_CFG_AVGS_SHIFT))&ADC_CFG_AVGS_MASK)