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Searched refs:ADC_CFG_ADLSMP_MASK (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-latest/imx/drivers/
Dadc_imx6sx.c146 ADC_CFG_REG(base) &= ~ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
152 ADC_CFG_REG(base) &= ~ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
158 ADC_CFG_REG(base) &= ~ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
164 ADC_CFG_REG(base) &= ~ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
170 ADC_CFG_REG(base) |= ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
176 ADC_CFG_REG(base) |= ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
182 ADC_CFG_REG(base) |= ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
188 ADC_CFG_REG(base) |= ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
/hal_nxp-latest/mcux/mcux-sdk/drivers/adc_12b1msps_sar/
Dfsl_adc.c84 tmp32 |= ADC_CFG_ADLSMP_MASK; in ADC_Init()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h689 #define ADC_CFG_ADLSMP_MASK (0x10U) macro
695 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h1043 #define ADC_CFG_ADLSMP_MASK (0x10U) macro
1049 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h1186 #define ADC_CFG_ADLSMP_MASK (0x10U) macro
1192 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h1206 #define ADC_CFG_ADLSMP_MASK (0x10U) macro
1212 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h1417 #define ADC_CFG_ADLSMP_MASK (0x10U) macro
1423 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h1396 #define ADC_CFG_ADLSMP_MASK (0x10U) macro
1402 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h1420 #define ADC_CFG_ADLSMP_MASK (0x10U) macro
1426 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h1398 #define ADC_CFG_ADLSMP_MASK (0x10U) macro
1404 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h1473 #define ADC_CFG_ADLSMP_MASK (0x10U) macro
1479 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h1555 #define ADC_CFG_ADLSMP_MASK (0x10U) macro
1561 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h1477 #define ADC_CFG_ADLSMP_MASK (0x10U) macro
1483 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h385 #define ADC_CFG_ADLSMP_MASK 0x10u macro