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Searched refs:ADC2_IRQn (Results 1 – 25 of 36) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_COMMON.h298 …ADC2_IRQn = 182, /**< End of conversion, Error interrupt, Watchdog… enumerator
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1173/
Dfsl_pm_device.h585 #define PM_WSID_ADC2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(ADC2_IRQn) /*!< AD…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1176/
Dfsl_pm_device.h585 #define PM_WSID_ADC2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(ADC2_IRQn) /*!< AD…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1172/
Dfsl_pm_device.h585 #define PM_WSID_ADC2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(ADC2_IRQn) /*!< AD…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1175/
Dfsl_pm_device.h585 #define PM_WSID_ADC2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(ADC2_IRQn) /*!< AD…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1171/
Dfsl_pm_device.h585 #define PM_WSID_ADC2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(ADC2_IRQn) /*!< AD…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h201 ADC2_IRQn = 74, /**< ADC conversion complete interrupt */ enumerator
1018 #define ADC_IRQS { ADC0_IRQn, ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h201 ADC2_IRQn = 74, /**< ADC conversion complete interrupt */ enumerator
1018 #define ADC_IRQS { ADC0_IRQn, ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h201 ADC2_IRQn = 74, /**< ADC conversion complete interrupt */ enumerator
1018 #define ADC_IRQS { ADC0_IRQn, ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h160 ADC2_IRQn = 68, /**< ADC2 interrupt */ enumerator
1442 #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h152 ADC2_IRQn = 68, /**< ADC2 interrupt */ enumerator
1422 #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h150 ADC2_IRQn = 68, /**< ADC2 interrupt */ enumerator
1632 #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h162 ADC2_IRQn = 68, /**< ADC2 interrupt */ enumerator
1653 #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h150 ADC2_IRQn = 68, /**< ADC2 interrupt */ enumerator
1634 #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h162 ADC2_IRQn = 68, /**< ADC2 interrupt */ enumerator
1656 #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h165 ADC2_IRQn = 68, /**< ADC2 interrupt */ enumerator
1709 #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h166 ADC2_IRQn = 68, /**< ADC2 interrupt */ enumerator
1713 #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h162 ADC2_IRQn = 68, /**< ADC2 interrupt */ enumerator
1791 #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h217 ADC2_IRQn = 101, /**< ADC2 interrupt request. */ enumerator
469 #define ADC_IRQS { ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h220 ADC2_IRQn = 99, /**< ADC-2 Interrupt */ enumerator
718 #define ADC_IRQS { ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm4.h183 ADC2_IRQn = 89, /**< ADC2 interrupt */ enumerator
3083 #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
DMIMXRT1165_cm7.h183 ADC2_IRQn = 89, /**< ADC2 interrupt */ enumerator
3086 #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h185 ADC2_IRQn = 89, /**< ADC2 interrupt */ enumerator
3095 #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h185 ADC2_IRQn = 89, /**< ADC2 interrupt */ enumerator
3092 #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
DMIMXRT1175_cm7.h185 ADC2_IRQn = 89, /**< ADC2 interrupt */ enumerator
3095 #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }

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