Home
last modified time | relevance | path

Searched refs:ACM_GPT0_CLK_SEL_SEL_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h714 #define ACM_GPT0_CLK_SEL_SEL_MASK (0x7U) macro
717 … (((uint32_t)(((uint32_t)(x)) << ACM_GPT0_CLK_SEL_SEL_SHIFT)) & ACM_GPT0_CLK_SEL_SEL_MASK)
DMIMX8QM6_dsp.h674 #define ACM_GPT0_CLK_SEL_SEL_MASK (0x7U) macro
677 … (((uint32_t)(((uint32_t)(x)) << ACM_GPT0_CLK_SEL_SEL_SHIFT)) & ACM_GPT0_CLK_SEL_SEL_MASK)
DMIMX8QM6_cm4_core1.h722 #define ACM_GPT0_CLK_SEL_SEL_MASK (0x7U) macro
724 … (((uint32_t)(((uint32_t)(x)) << ACM_GPT0_CLK_SEL_SEL_SHIFT)) & ACM_GPT0_CLK_SEL_SEL_MASK)
DMIMX8QM6_cm4_core0.h722 #define ACM_GPT0_CLK_SEL_SEL_MASK (0x7U) macro
724 … (((uint32_t)(((uint32_t)(x)) << ACM_GPT0_CLK_SEL_SEL_SHIFT)) & ACM_GPT0_CLK_SEL_SEL_MASK)