Searched refs:tmpreg (Results 1 – 6 of 6) sorted by relevance
163 uint32_t tmpreg, i = 0U; in EDMA_Init() local180 tmpreg = EDMA_BASE(base)->CR; in EDMA_Init()181 tmpreg &= ~(DMA_CR_ERCA_MASK | DMA_CR_HOE_MASK | DMA_CR_CLM_MASK | DMA_CR_EDBG_MASK); in EDMA_Init()182 …tmpreg |= (DMA_CR_ERCA(config->enableRoundRobinArbitration) | DMA_CR_HOE(config->enableHaltOnError… in EDMA_Init()184 EDMA_BASE(base)->CR = tmpreg; in EDMA_Init()186 tmpreg = EDMA_MP_BASE(base)->MP_CSR; in EDMA_Init()188 …tmpreg = (tmpreg & ~(DMA_MP_CSR_HAE_MASK | DMA_MP_CSR_ERCA_MASK | DMA_MP_CSR_EDBG_MASK | DMA_MP_CS… in EDMA_Init()194 …tmpreg = (tmpreg & ~(DMA_MP_CSR_HAE_MASK | DMA_MP_CSR_ERCA_MASK | DMA_MP_CSR_EDBG_MASK | DMA_MP_CS… in EDMA_Init()199 EDMA_MP_BASE(base)->MP_CSR = tmpreg; in EDMA_Init()388 uint32_t tmpreg; in EDMA_SetMinorOffsetConfig() local[all …]
150 uint32_t tmpreg; in DMA_SetTransferConfig() local159 tmpreg = base->DMA[channel].DCR; in DMA_SetTransferConfig()160 tmpreg &= ~(DMA_DCR_DSIZE_MASK | DMA_DCR_DINC_MASK | DMA_DCR_SSIZE_MASK | DMA_DCR_SINC_MASK); in DMA_SetTransferConfig()161 tmpreg |= (DMA_DCR_DSIZE(config->destSize) | DMA_DCR_DINC(config->enableDestIncrement) | in DMA_SetTransferConfig()163 base->DMA[channel].DCR = tmpreg; in DMA_SetTransferConfig()186 uint32_t tmpreg; in DMA_SetChannelLinkConfig() local188 tmpreg = base->DMA[channel].DCR; in DMA_SetChannelLinkConfig()189 tmpreg &= ~(DMA_DCR_LINKCC_MASK | DMA_DCR_LCH1_MASK | DMA_DCR_LCH2_MASK); in DMA_SetChannelLinkConfig()190 …tmpreg |= (DMA_DCR_LINKCC(config->linkType) | DMA_DCR_LCH1(config->channel1) | DMA_DCR_LCH2(config… in DMA_SetChannelLinkConfig()191 base->DMA[channel].DCR = tmpreg; in DMA_SetChannelLinkConfig()[all …]
150 uint32_t tmpreg; in EDMA_AD_Init() local152 tmpreg = base->MP_CSR; in EDMA_AD_Init()153 tmpreg &= ~(DMA_MP_CSR_HAE_MASK | DMA_MP_CSR_ERCA_MASK | DMA_MP_CSR_EDBG_MASK); in EDMA_AD_Init()155 … tmpreg = (tmpreg & (~DMA_MP_CSR_GMRC_MASK)) | DMA_MP_CSR_GMRC(config->enableMasterIdReplication); in EDMA_AD_Init()158 tmpreg = (tmpreg & (~DMA_MP_CSR_EBW_MASK)) | DMA_MP_CSR_EBW(config->enableBufferedWrites); in EDMA_AD_Init()161 …tmpreg |= (DMA_MP_CSR_HAE(config->enableHaltOnError) | DMA_MP_CSR_ERCA(config->enableRoundRobinArb… in EDMA_AD_Init()164 base->MP_CSR = tmpreg; in EDMA_AD_Init()561 uint32_t tmpreg; in EDMA_AD_TcdSetMinorOffsetConfig() local563 tmpreg = tcd->NBYTES; in EDMA_AD_TcdSetMinorOffsetConfig()564 tmpreg &= in EDMA_AD_TcdSetMinorOffsetConfig()[all …]
181 uint32_t tmpreg; in EDMA_Init() local183 tmpreg = base->MP_CSR; in EDMA_Init()184 tmpreg &= ~(DMA_MP_CSR_HAE_MASK | DMA_MP_CSR_ERCA_MASK | DMA_MP_CSR_EDBG_MASK); in EDMA_Init()186 … tmpreg = (tmpreg & (~DMA_MP_CSR_GMRC_MASK)) | DMA_MP_CSR_GMRC(config->enableMasterIdReplication); in EDMA_Init()189 tmpreg = (tmpreg & (~DMA_MP_CSR_EBW_MASK)) | DMA_MP_CSR_EBW(config->enableBufferedWrites); in EDMA_Init()192 …tmpreg |= (DMA_MP_CSR_HAE(config->enableHaltOnError) | DMA_MP_CSR_ERCA(config->enableRoundRobinArb… in EDMA_Init()195 base->MP_CSR = tmpreg; in EDMA_Init()589 uint32_t tmpreg; in EDMA_TcdSetMinorOffsetConfig() local591 tmpreg = tcd->NBYTES; in EDMA_TcdSetMinorOffsetConfig()592 tmpreg &= in EDMA_TcdSetMinorOffsetConfig()[all …]
124 uint32_t tmpreg; in EDMA_Init() local136 tmpreg = base->CR; in EDMA_Init()137 tmpreg &= ~(DMA_CR_ERCA_MASK | DMA_CR_HOE_MASK | DMA_CR_CLM_MASK | DMA_CR_EDBG_MASK); in EDMA_Init()138 …tmpreg |= (DMA_CR_ERCA(config->enableRoundRobinArbitration) | DMA_CR_HOE(config->enableHaltOnError… in EDMA_Init()140 base->CR = tmpreg; in EDMA_Init()256 uint32_t tmpreg; in EDMA_SetMinorOffsetConfig() local258 tmpreg = base->TCD[channel].NBYTES_MLOFFYES; in EDMA_SetMinorOffsetConfig()259 …tmpreg &= ~(DMA_NBYTES_MLOFFYES_SMLOE_MASK | DMA_NBYTES_MLOFFYES_DMLOE_MASK | DMA_NBYTES_MLOFFYES_… in EDMA_SetMinorOffsetConfig()260 tmpreg |= in EDMA_SetMinorOffsetConfig()263 base->TCD[channel].NBYTES_MLOFFYES = tmpreg; in EDMA_SetMinorOffsetConfig()[all …]
363 uint32_t tmpreg; in SDMA_Init() local398 tmpreg = base->CONFIG; in SDMA_Init()399 tmpreg &= ~(SDMAARM_CONFIG_ACR_MASK | SDMAARM_CONFIG_RTDOBS_MASK | SDMAARM_CONFIG_CSM_MASK); in SDMA_Init()401 …tmpreg |= (SDMAARM_CONFIG_ACR(config->ratio) | SDMAARM_CONFIG_RTDOBS(config->enableRealTimeDebugPi… in SDMA_Init()403 base->CONFIG = tmpreg; in SDMA_Init()405 tmpreg = base->SDMA_LOCK; in SDMA_Init()406 tmpreg &= ~SDMAARM_SDMA_LOCK_SRESET_LOCK_CLR_MASK; in SDMA_Init()407 tmpreg |= SDMAARM_SDMA_LOCK_SRESET_LOCK_CLR(config->isSoftwareResetClearLock); in SDMA_Init()408 base->SDMA_LOCK = tmpreg; in SDMA_Init()
