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Searched refs:WRITE_DDR (Results 1 – 25 of 40) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt595/flash_config/
Dflash_config.h57 #define WRITE_DDR 0x28 macro
Dflash_config.c86 … [4 * 9 + 1] = FLEXSPI_LUT_SEQ(RADDR_DDR, FLEXSPI_8PAD, 0x20, WRITE_DDR, FLEXSPI_8PAD, 0x04),
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt685/flash_config/
Dflash_config.h44 #define WRITE_DDR 0x28 macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/mimxrt685audevk/flash_config/
Dflash_config.h44 #define WRITE_DDR 0x28 macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt1064/xip/
Devkmimxrt1064_flexspi_nor_config.h55 #define WRITE_DDR 0x28 macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt1160/xip/
Devkmimxrt1160_flexspi_nor_config.h55 #define WRITE_DDR 0x28 macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt1010/xip/
Devkmimxrt1010_flexspi_nor_config.h55 #define WRITE_DDR 0x28 macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkbimxrt1050/xip/
Devkbimxrt1050_flexspi_nor_config.h55 #define WRITE_DDR 0x28 macro
Devkbimxrt1050_flexspi_nor_config.c115 … FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, WRITE_DDR, FLEXSPI_8PAD, 0x80),
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt1024/xip/
Devkmimxrt1024_flexspi_nor_config.h55 #define WRITE_DDR 0x28 macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt1040/xip/
Devkmimxrt1040_flexspi_nor_config.h55 #define WRITE_DDR 0x28 macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt1060/xip/
Devkmimxrt1060_flexspi_nor_config.h55 #define WRITE_DDR 0x28 macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt1170/xip/
Devkmimxrt1170_flexspi_nor_config.h55 #define WRITE_DDR 0x28 macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt1015/xip/
Devkmimxrt1015_flexspi_nor_config.h55 #define WRITE_DDR 0x28 macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt1020/xip/
Devkmimxrt1020_flexspi_nor_config.h55 #define WRITE_DDR 0x28 macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkbmimxrt1170/xip/
Devkbmimxrt1170_flexspi_nor_config.h55 #define WRITE_DDR 0x28 macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkcmimxrt1060/xip/
Devkcmimxrt1060_flexspi_nor_config.h55 #define WRITE_DDR 0x28 macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkbmimxrt1060/xip/
Devkbmimxrt1060_flexspi_nor_config.h55 #define WRITE_DDR 0x28 macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt1024/cmsis_pack_flash_algo/Sources/
Dfsl_romapi.h81 #define WRITE_DDR 0x28U macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1015/drivers/
Dfsl_romapi.h81 #define WRITE_DDR 0x28U macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1052/drivers/
Dfsl_romapi.h81 #define WRITE_DDR 0x28U macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1021/drivers/
Dfsl_romapi.h81 #define WRITE_DDR 0x28U macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1024/drivers/
Dfsl_romapi.h81 #define WRITE_DDR 0x28U macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1051/drivers/
Dfsl_romapi.h81 #define WRITE_DDR 0x28U macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1061/drivers/
Dfsl_romapi.h81 #define WRITE_DDR 0x28U macro

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