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Searched refs:WDOG1_BASE (Results 1 – 25 of 67) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm0plus.h22007 #define WDOG1_BASE (0x41026000u) macro
22009 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
22011 #define WDOG_BASE_ADDRS { WDOG0_BASE, WDOG1_BASE }
DK32L3A60_cm4.h21957 #define WDOG1_BASE (0x41026000u) macro
21959 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
21961 #define WDOG_BASE_ADDRS { WDOG0_BASE, WDOG1_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h34372 #define WDOG1_BASE (0x400B8000u) macro
34374 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
34380 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h36834 #define WDOG1_BASE (0x400B8000u) macro
36836 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
36842 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h38250 #define WDOG1_BASE (0x403D0000u) macro
38252 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
38258 #define WDOG_BASE_ADDRS { WDOG0_BASE, WDOG1_BASE, WDOG2_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h38251 #define WDOG1_BASE (0x403D0000u) macro
38253 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
38259 #define WDOG_BASE_ADDRS { WDOG0_BASE, WDOG1_BASE, WDOG2_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h43929 #define WDOG1_BASE (0x400B8000u) macro
43931 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
43937 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h43908 #define WDOG1_BASE (0x400B8000u) macro
43910 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
43916 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h46990 #define WDOG1_BASE (0x400B8000u) macro
46992 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
46998 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h46022 #define WDOG1_BASE (0x400B8000u) macro
46024 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
46030 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h48381 #define WDOG1_BASE (0x400B8000u) macro
48383 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
48389 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h50288 #define WDOG1_BASE (0x400B8000u) macro
50290 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
50296 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h50400 #define WDOG1_BASE (0x400B8000u) macro
50402 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
50408 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX9352/
DMIMX9352_cm33.h149299 #define WDOG1_BASE (0x542D0000u) macro
149303 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
149341 WDOG1_BASE, WDOG2_BASE, WDOG3_BASE, WDOG4_BASE, WDOG5_BASE \
149360 #define WDOG1_BASE (0x442D0000u) macro
149362 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
149382 WDOG1_BASE, WDOG2_BASE, WDOG3_BASE, WDOG4_BASE, WDOG5_BASE \
DMIMX9352_ca55.h130361 #define WDOG1_BASE (0x542D0000u) macro
130365 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
130401 …#define WDOG_BASE_ADDRS { WDOG1_BASE, WDOG2_BASE, WDOG3_BASE, WDOG4_BASE,…
130410 #define WDOG1_BASE (0x442D0000u) macro
130412 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
130430 …#define WDOG_BASE_ADDRS { WDOG1_BASE, WDOG2_BASE, WDOG3_BASE, WDOG4_BASE,…
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h52575 #define WDOG1_BASE (0x400B8000u) macro
52577 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
52583 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h56738 #define WDOG1_BASE (0x30280000u) macro
56740 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
56750 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE, WDOG3_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h55419 #define WDOG1_BASE (0x30280000u) macro
55421 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
55431 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE, WDOG3_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h55417 #define WDOG1_BASE (0x30280000u) macro
55419 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
55429 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE, WDOG3_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h55419 #define WDOG1_BASE (0x30280000u) macro
55421 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
55431 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE, WDOG3_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_ca53.h55430 #define WDOG1_BASE (0x30280000u) macro
55432 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
55442 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE, WDOG3_BASE }
DMIMX8MN6_cm7.h55417 #define WDOG1_BASE (0x30280000u) macro
55419 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
55429 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE, WDOG3_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h55417 #define WDOG1_BASE (0x30280000u) macro
55419 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
55429 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE, WDOG3_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h55419 #define WDOG1_BASE (0x30280000u) macro
55421 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
55431 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE, WDOG3_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h52511 #define WDOG1_BASE (0x400B8000u) macro
52513 #define WDOG1 ((WDOG_Type *)WDOG1_BASE)
52519 #define WDOG_BASE_ADDRS { 0u, WDOG1_BASE, WDOG2_BASE }

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