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Searched refs:USDHC0_IRQn (Results 1 – 19 of 19) sorted by relevance

/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt595/wireless_config_template/
Dsdmmc_config.h30 #define BOARD_SDMMC_SD_HOST_IRQ USDHC0_IRQn
32 #define BOARD_SDMMC_MMC_HOST_IRQ USDHC0_IRQn
34 #define BOARD_SDMMC_SDIO_HOST_IRQ USDHC0_IRQn
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt685/wireless_config_template/
Dsdmmc_config.h30 #define BOARD_SDMMC_SD_HOST_IRQ USDHC0_IRQn
33 #define BOARD_SDMMC_SDIO_HOST_IRQ USDHC0_IRQn
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/mimxrt685audevk/
Dboard.h165 #define BOARD_USDHC_CD_PORT_IRQ USDHC0_IRQn
199 #define BOARD_SD_HOST_IRQ USDHC0_IRQn
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt685/
Dboard.h170 #define BOARD_USDHC_CD_PORT_IRQ USDHC0_IRQn
204 #define BOARD_SD_HOST_IRQ USDHC0_IRQn
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm0plus.h124 USDHC0_IRQn = 49, /**< SDHC0 interrupt (INTMUX1 source IRQ17) */ enumerator
21700 #define USDHC_IRQS { USDHC0_IRQn }
DK32L3A60_cm4.h119 USDHC0_IRQn = 40, /**< SDHC0 interrupt */ enumerator
21650 #define USDHC_IRQS { USDHC0_IRQn }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h128 USDHC0_IRQn = 45, /**< USDHC0 (Enhanced SDHC) interrupt request */ enumerator
44734 #define USDHC_IRQS { USDHC0_IRQn, USDHC1_IRQn }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_cm33.h128 USDHC0_IRQn = 45, /**< USDHC0 (Enhanced SDHC) interrupt request */ enumerator
44734 #define USDHC_IRQS { USDHC0_IRQn, USDHC1_IRQn }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h132 USDHC0_IRQn = 45, /**< USDHC interrupt */ enumerator
58850 #define USDHC_IRQS { USDHC0_IRQn, USDHC1_IRQn }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_cm33.h133 USDHC0_IRQn = 45, /**< USDHC interrupt */ enumerator
60477 #define USDHC_IRQS { USDHC0_IRQn, USDHC1_IRQn }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h132 USDHC0_IRQn = 45, /**< USDHC interrupt */ enumerator
60476 #define USDHC_IRQS { USDHC0_IRQn, USDHC1_IRQn }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h143 …USDHC0_IRQn = 61, /**< Ultra Secured Digital Host Controller interr… enumerator
90023 #define USDHC_IRQS { USDHC0_IRQn }
DMCXN946_cm33_core1.h143 …USDHC0_IRQn = 61, /**< Ultra Secured Digital Host Controller interr… enumerator
90023 #define USDHC_IRQS { USDHC0_IRQn }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core1.h143 …USDHC0_IRQn = 61, /**< Ultra Secured Digital Host Controller interr… enumerator
87365 #define USDHC_IRQS { USDHC0_IRQn }
DMCXN547_cm33_core0.h143 …USDHC0_IRQn = 61, /**< Ultra Secured Digital Host Controller interr… enumerator
87365 #define USDHC_IRQS { USDHC0_IRQn }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h143 …USDHC0_IRQn = 61, /**< Ultra Secured Digital Host Controller interr… enumerator
87365 #define USDHC_IRQS { USDHC0_IRQn }
DMCXN546_cm33_core1.h143 …USDHC0_IRQn = 61, /**< Ultra Secured Digital Host Controller interr… enumerator
87365 #define USDHC_IRQS { USDHC0_IRQn }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core0.h143 …USDHC0_IRQn = 61, /**< Ultra Secured Digital Host Controller interr… enumerator
90023 #define USDHC_IRQS { USDHC0_IRQn }
DMCXN947_cm33_core1.h143 …USDHC0_IRQn = 61, /**< Ultra Secured Digital Host Controller interr… enumerator
90023 #define USDHC_IRQS { USDHC0_IRQn }