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Searched refs:SYS_CTRL (Results 1 – 25 of 102) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/usdhc/
Dfsl_usdhc.c852 … base->SYS_CTRL |= USDHC_SYS_CTRL_RSTA_MASK | USDHC_SYS_CTRL_RSTC_MASK | USDHC_SYS_CTRL_RSTD_MASK; in USDHC_Init()
856 sysctl = base->SYS_CTRL; in USDHC_Init()
878 base->SYS_CTRL = sysctl; in USDHC_Init()
918 …base->SYS_CTRL |= (mask & (USDHC_SYS_CTRL_RSTA_MASK | USDHC_SYS_CTRL_RSTC_MASK | USDHC_SYS_CTRL_RS… in USDHC_Reset()
924 while (IS_USDHC_FLAG_SET(base->SYS_CTRL, mask)) in USDHC_Reset()
1081 sysctl = base->SYS_CTRL; in USDHC_SetSdClock()
1084 base->SYS_CTRL = sysctl; in USDHC_SetSdClock()
1107 base->SYS_CTRL |= USDHC_SYS_CTRL_INITA_MASK; in USDHC_SetCardActive()
1109 while (IS_USDHC_FLAG_SET(base->SYS_CTRL, USDHC_SYS_CTRL_INITA_MASK)) in USDHC_SetCardActive()
1130 …uint32_t prescaler = (base->SYS_CTRL & USDHC_SYS_CTRL_SDCLKFS_MASK) >> USDHC_SYS_CTRL_SDCLKFS_SHIF… in USDHC_EnableDDRMode()
[all …]
Dfsl_usdhc.h1112 base->SYS_CTRL |= USDHC_SYS_CTRL_IPP_RST_N_MASK; in USDHC_AssertHardwareReset()
1116 base->SYS_CTRL &= ~USDHC_SYS_CTRL_IPP_RST_N_MASK; in USDHC_AssertHardwareReset()
/hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_USDHC.h84 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm0plus.h20466 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
DK32L3A60_cm4.h20416 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/imx/devices/MCIMX6X/
DMCIMX6X_M4.h40289 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
40333 #define uSDHC_SYS_CTRL_REG(base) ((base)->SYS_CTRL)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h31864 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
DMIMXRT685S_cm33.h42816 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/imx/devices/MCIMX7D/
DMCIMX7D_M4.h43898 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
43945 #define uSDHC_SYS_CTRL_REG(base) ((base)->SYS_CTRL)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h35857 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h35858 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h42816 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h47521 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h41964 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h41943 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h45025 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h44024 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h46416 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h48290 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h48435 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h56931 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h50610 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h54524 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h53255 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h53253 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member

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