/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/usdhc/ |
D | fsl_usdhc.c | 852 … base->SYS_CTRL |= USDHC_SYS_CTRL_RSTA_MASK | USDHC_SYS_CTRL_RSTC_MASK | USDHC_SYS_CTRL_RSTD_MASK; in USDHC_Init() 856 sysctl = base->SYS_CTRL; in USDHC_Init() 878 base->SYS_CTRL = sysctl; in USDHC_Init() 918 …base->SYS_CTRL |= (mask & (USDHC_SYS_CTRL_RSTA_MASK | USDHC_SYS_CTRL_RSTC_MASK | USDHC_SYS_CTRL_RS… in USDHC_Reset() 924 while (IS_USDHC_FLAG_SET(base->SYS_CTRL, mask)) in USDHC_Reset() 1081 sysctl = base->SYS_CTRL; in USDHC_SetSdClock() 1084 base->SYS_CTRL = sysctl; in USDHC_SetSdClock() 1107 base->SYS_CTRL |= USDHC_SYS_CTRL_INITA_MASK; in USDHC_SetCardActive() 1109 while (IS_USDHC_FLAG_SET(base->SYS_CTRL, USDHC_SYS_CTRL_INITA_MASK)) in USDHC_SetCardActive() 1130 …uint32_t prescaler = (base->SYS_CTRL & USDHC_SYS_CTRL_SDCLKFS_MASK) >> USDHC_SYS_CTRL_SDCLKFS_SHIF… in USDHC_EnableDDRMode() [all …]
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D | fsl_usdhc.h | 1112 base->SYS_CTRL |= USDHC_SYS_CTRL_IPP_RST_N_MASK; in USDHC_AssertHardwareReset() 1116 base->SYS_CTRL &= ~USDHC_SYS_CTRL_IPP_RST_N_MASK; in USDHC_AssertHardwareReset()
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/hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/ |
D | S32Z2_USDHC.h | 84 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L3A60/ |
D | K32L3A60_cm0plus.h | 20466 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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D | K32L3A60_cm4.h | 20416 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/imx/devices/MCIMX6X/ |
D | MCIMX6X_M4.h | 40289 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member 40333 #define uSDHC_SYS_CTRL_REG(base) ((base)->SYS_CTRL)
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT685S/ |
D | MIMXRT685S_dsp.h | 31864 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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D | MIMXRT685S_cm33.h | 42816 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/imx/devices/MCIMX7D/ |
D | MCIMX7D_M4.h | 43898 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member 43945 #define uSDHC_SYS_CTRL_REG(base) ((base)->SYS_CTRL)
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U3/ |
D | MCIMX7U3_cm4.h | 35857 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U5/ |
D | MCIMX7U5_cm4.h | 35858 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT633S/ |
D | MIMXRT633S.h | 42816 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT595S/ |
D | MIMXRT595S_dsp.h | 47521 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1021/ |
D | MIMXRT1021.h | 41964 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1024/ |
D | MIMXRT1024.h | 41943 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1041/ |
D | MIMXRT1041.h | 45025 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1051/ |
D | MIMXRT1051.h | 44024 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1061/ |
D | MIMXRT1061.h | 46416 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1052/ |
D | MIMXRT1052.h | 48290 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1042/ |
D | MIMXRT1042.h | 48435 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT533S/ |
D | MIMXRT533S.h | 56931 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1062/ |
D | MIMXRT1062.h | 50610 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ5/ |
D | MIMX8MQ5_cm4.h | 54524 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN1/ |
D | MIMX8MN1_cm7.h | 53255 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN2/ |
D | MIMX8MN2_cm7.h | 53253 __IO uint32_t SYS_CTRL; /**< System Control, offset: 0x2C */ member
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