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Searched refs:SYSPLL0CLKSEL (Results 1 – 19 of 19) sorted by relevance

/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT595S/
Dsystem_MIMXRT595S_dsp.c57 switch ((CLKCTL0->SYSPLL0CLKSEL) & CLKCTL0_SYSPLL0CLKSEL_SEL_MASK) in getSpllFreq()
Dsystem_MIMXRT595S_cm33.c184 switch ((CLKCTL0->SYSPLL0CLKSEL) & CLKCTL0_SYSPLL0CLKSEL_SEL_MASK) in SystemCoreClockUpdate()
DMIMXRT595S_dsp.h1937 __IO uint32_t SYSPLL0CLKSEL; /**< System PLL 0 Clock Select, offset: 0x200 */ member
DMIMXRT595S_cm33.h8175 __IO uint32_t SYSPLL0CLKSEL; /**< System PLL 0 Clock Select, offset: 0x200 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT685S/
Dsystem_MIMXRT685S_dsp.c80 switch ((CLKCTL0->SYSPLL0CLKSEL) & CLKCTL0_SYSPLL0CLKSEL_SEL_MASK) in getSpllFreq()
Dsystem_MIMXRT685S_cm33.c175 switch ((CLKCTL0->SYSPLL0CLKSEL) & CLKCTL0_SYSPLL0CLKSEL_SEL_MASK) in SystemCoreClockUpdate()
DMIMXRT685S_dsp.h1251 …__IO uint32_t SYSPLL0CLKSEL; /**< system pll0 clock selection, offset: 0x200 */ member
DMIMXRT685S_cm33.h6962 …__IO uint32_t SYSPLL0CLKSEL; /**< system pll0 clock selection, offset: 0x200 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT633S/
Dsystem_MIMXRT633S.c174 switch ((CLKCTL0->SYSPLL0CLKSEL) & CLKCTL0_SYSPLL0CLKSEL_SEL_MASK) in SystemCoreClockUpdate()
DMIMXRT633S.h6962 …__IO uint32_t SYSPLL0CLKSEL; /**< system pll0 clock selection, offset: 0x200 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT533S/
Dsystem_MIMXRT533S.c183 switch ((CLKCTL0->SYSPLL0CLKSEL) & CLKCTL0_SYSPLL0CLKSEL_SEL_MASK) in SystemCoreClockUpdate()
DMIMXRT533S.h8171 __IO uint32_t SYSPLL0CLKSEL; /**< System PLL 0 Clock Select, offset: 0x200 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT555S/
Dsystem_MIMXRT555S.c183 switch ((CLKCTL0->SYSPLL0CLKSEL) & CLKCTL0_SYSPLL0CLKSEL_SEL_MASK) in SystemCoreClockUpdate()
DMIMXRT555S.h8174 __IO uint32_t SYSPLL0CLKSEL; /**< System PLL 0 Clock Select, offset: 0x200 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_clock.c148 switch ((CLKCTL0->SYSPLL0CLKSEL) & CLKCTL0_SYSPLL0CLKSEL_SEL_MASK) in CLOCK_GetSysPllFreq()
1252 CLKCTL0->SYSPLL0CLKSEL = (uint32_t)config->sys_pll_src; in CLOCK_InitSysPll()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_clock.c148 switch ((CLKCTL0->SYSPLL0CLKSEL) & CLKCTL0_SYSPLL0CLKSEL_SEL_MASK) in CLOCK_GetSysPllFreq()
1252 CLKCTL0->SYSPLL0CLKSEL = (uint32_t)config->sys_pll_src; in CLOCK_InitSysPll()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_clock.c129 switch ((CLKCTL0->SYSPLL0CLKSEL) & CLKCTL0_SYSPLL0CLKSEL_SEL_MASK) in CLOCK_GetSysPllFreq()
1372 CLKCTL0->SYSPLL0CLKSEL = (uint32_t)config->sys_pll_src; in CLOCK_InitSysPll()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_clock.c129 switch ((CLKCTL0->SYSPLL0CLKSEL) & CLKCTL0_SYSPLL0CLKSEL_SEL_MASK) in CLOCK_GetSysPllFreq()
1372 CLKCTL0->SYSPLL0CLKSEL = (uint32_t)config->sys_pll_src; in CLOCK_InitSysPll()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_clock.c129 switch ((CLKCTL0->SYSPLL0CLKSEL) & CLKCTL0_SYSPLL0CLKSEL_SEL_MASK) in CLOCK_GetSysPllFreq()
1372 CLKCTL0->SYSPLL0CLKSEL = (uint32_t)config->sys_pll_src; in CLOCK_InitSysPll()