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Searched refs:SYSCON_PLL0SSCG1_MD_REQ_MASK (Results 1 – 24 of 24) sorted by relevance

/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h23271 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
23275 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h23118 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
23122 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h23271 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
23275 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h23118 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
23122 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h23118 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
23122 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5506/
DLPC5506.h23271 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
23275 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S06/
DLPC55S06.h25539 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
25543 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5526/
DLPC5526.h22455 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
22459 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S04/
DLPC55S04.h25539 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
25543 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5528/
DLPC5528.h22454 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
22458 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5512/
DLPC5512.h24364 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
24368 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S26/
DLPC55S26.h24111 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
24115 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S28/
DLPC55S28.h24110 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
24114 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core1.h24730 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
24734 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
DLPC55S69_cm33_core0.h24730 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
24734 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S14/
DLPC55S14.h26633 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
26637 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S16/
DLPC55S16.h26634 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
26638 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5514/
DLPC5514.h24365 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
24369 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core0.h24731 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
24735 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
DLPC55S66_cm33_core1.h24731 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
24735 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5516/
DLPC5516.h24366 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
24370 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h44012 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
44015 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h44012 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
44015 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h53717 #define SYSCON_PLL0SSCG1_MD_REQ_MASK (0x2U) macro
53720 … (((uint32_t)(((uint32_t)(x)) << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)) & SYSCON_PLL0SSCG1_MD_REQ_MASK)