Searched refs:SW_PAD_CTL_PAD_SD3_DATA4 (Results 1 – 2 of 2) sorted by relevance
15993 __IO uint32_t SW_PAD_CTL_PAD_SD3_DATA4; /**< Pad Control Register, offset: 0x5B0 */ member16542 #define IOMUXC_SW_PAD_CTL_PAD_SD3_DATA4_REG(base) ((base)->SW_PAD_CTL_PAD_SD3_DATA4)
21919 …__IO uint32_t SW_PAD_CTL_PAD_SD3_DATA4; /**< SW_PAD_CTL_PAD_SD3_DATA4 SW PAD Contro… member22390 #define IOMUXC_SW_PAD_CTL_PAD_SD3_DATA4_REG(base) ((base)->SW_PAD_CTL_PAD_SD3_DATA4)
