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Searched refs:SW_PAD_CTL_PAD_NAND_DATA02 (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-3.7.0/imx/devices/MCIMX6X/
DMCIMX6X_M4.h15925 __IO uint32_t SW_PAD_CTL_PAD_NAND_DATA02; /**< Pad Control Register, offset: 0x4A0 */ member
16474 #define IOMUXC_SW_PAD_CTL_PAD_NAND_DATA02_REG(base) ((base)->SW_PAD_CTL_PAD_NAND_DATA02)