Searched refs:SW_PAD_CTL_PAD_GPIO1_IO10 (Results 1 – 2 of 2) sorted by relevance
15854 __IO uint32_t SW_PAD_CTL_PAD_GPIO1_IO10; /**< Pad Control Register, offset: 0x384 */ member16403 #define IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO10_REG(base) ((base)->SW_PAD_CTL_PAD_GPIO1_IO10)
21798 …__IO uint32_t SW_PAD_CTL_PAD_GPIO1_IO10; /**< SW_PAD_CTL_PAD_GPIO1_IO10 SW PAD Contr… member22269 #define IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO10_REG(base) ((base)->SW_PAD_CTL_PAD_GPIO1_IO10)
