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Searched refs:SW_PAD_CTL_GRP_ADDDS (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-3.7.0/imx/devices/MCIMX6X/
DMCIMX6X_M4.h16010 …__IO uint32_t SW_PAD_CTL_GRP_ADDDS; /**< Pad Group Control Register, offset: 0x… member
16559 #define IOMUXC_SW_PAD_CTL_GRP_ADDDS_REG(base) ((base)->SW_PAD_CTL_GRP_ADDDS)