Searched refs:SW_MUX_CTL_PAD_SD1_CLK (Results 1 – 2 of 2) sorted by relevance
15765 __IO uint32_t SW_MUX_CTL_PAD_SD1_CLK; /**< Pad Mux Register, offset: 0x220 */ member16314 #define IOMUXC_SW_MUX_CTL_PAD_SD1_CLK_REG(base) ((base)->SW_MUX_CTL_PAD_SD1_CLK)
21742 …__IO uint32_t SW_MUX_CTL_PAD_SD1_CLK; /**< SW_MUX_CTL_PAD_SD1_CLK SW MUX Control … member22213 #define IOMUXC_SW_MUX_CTL_PAD_SD1_CLK_REG(base) ((base)->SW_MUX_CTL_PAD_SD1_CLK)
