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Searched refs:SW_MUX_CTL_PAD_RGMII1_RD3 (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-3.7.0/imx/devices/MCIMX6X/
DMCIMX6X_M4.h15744 __IO uint32_t SW_MUX_CTL_PAD_RGMII1_RD3; /**< Pad Mux Register, offset: 0x1CC */ member
16293 #define IOMUXC_SW_MUX_CTL_PAD_RGMII1_RD3_REG(base) ((base)->SW_MUX_CTL_PAD_RGMII1_RD3)