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Searched refs:SW_MUX_CTL_PAD_ECSPI2_SS0 (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-3.7.0/imx/devices/MCIMX7D/
DMCIMX7D_M4.h21738 …__IO uint32_t SW_MUX_CTL_PAD_ECSPI2_SS0; /**< SW_MUX_CTL_PAD_ECSPI2_SS0 SW MUX Contr… member
22209 #define IOMUXC_SW_MUX_CTL_PAD_ECSPI2_SS0_REG(base) ((base)->SW_MUX_CTL_PAD_ECSPI2_SS0)