Searched refs:STARTEN1_CLR (Results 1 – 12 of 12) sorted by relevance
374 SYSCTL0->STARTEN1_CLR = 1UL << ((uint32_t)PMC_PMIC_IRQn - 32U); in POWER_EnterRbb()421 SYSCTL0->STARTEN1_CLR = 1UL << ((uint32_t)PMC_PMIC_IRQn - 32U); in POWER_EnterFbb()467 SYSCTL0->STARTEN1_CLR = 1UL << ((uint32_t)PMC_PMIC_IRQn - 32U); in POWER_EnterNbb()1187 SYSCTL0->STARTEN1_CLR = 1UL << (intNumber - 32U); in DisableDeepSleepIRQ()
397 SYSCTL0->STARTEN1_CLR = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()445 SYSCTL0->STARTEN1_CLR = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()492 SYSCTL0->STARTEN1_CLR = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()1341 SYSCTL0->STARTEN1_CLR = 1UL << (intNumber - 32U); in DisableDeepSleepIRQ()
21103 __O uint32_t STARTEN1_CLR; /**< Start enable 1 clear, offset: 0x6C4 */ member
30712 __O uint32_t STARTEN1_CLR; /**< Start enable 1 clear, offset: 0x6C4 */ member
34046 __IO uint32_t STARTEN1_CLR; /**< Start Enable 1 clear, offset: 0x6C4 */ member
43837 __IO uint32_t STARTEN1_CLR; /**< Start Enable 1 clear, offset: 0x6C4 */ member
42210 __IO uint32_t STARTEN1_CLR; /**< Start Enable 1 clear, offset: 0x6C4 */ member
43836 __IO uint32_t STARTEN1_CLR; /**< Start Enable 1 clear, offset: 0x6C4 */ member
