Home
last modified time | relevance | path

Searched refs:SRC_M4RCR_DOMAIN2_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h51338 #define SRC_M4RCR_DOMAIN2_MASK (0x4000000U) macro
51344 … (((uint32_t)(((uint32_t)(x)) << SRC_M4RCR_DOMAIN2_SHIFT)) & SRC_M4RCR_DOMAIN2_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4.h53511 #define SRC_M4RCR_DOMAIN2_MASK (0x4000000U) macro
53517 … (((uint32_t)(((uint32_t)(x)) << SRC_M4RCR_DOMAIN2_SHIFT)) & SRC_M4RCR_DOMAIN2_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h53511 #define SRC_M4RCR_DOMAIN2_MASK (0x4000000U) macro
53517 … (((uint32_t)(((uint32_t)(x)) << SRC_M4RCR_DOMAIN2_SHIFT)) & SRC_M4RCR_DOMAIN2_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h53511 #define SRC_M4RCR_DOMAIN2_MASK (0x4000000U) macro
53517 … (((uint32_t)(((uint32_t)(x)) << SRC_M4RCR_DOMAIN2_SHIFT)) & SRC_M4RCR_DOMAIN2_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4.h53511 #define SRC_M4RCR_DOMAIN2_MASK (0x4000000U) macro
53517 … (((uint32_t)(((uint32_t)(x)) << SRC_M4RCR_DOMAIN2_SHIFT)) & SRC_M4RCR_DOMAIN2_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4.h67941 #define SRC_M4RCR_DOMAIN2_MASK (0x4000000U) macro
67947 … (((uint32_t)(((uint32_t)(x)) << SRC_M4RCR_DOMAIN2_SHIFT)) & SRC_M4RCR_DOMAIN2_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h67941 #define SRC_M4RCR_DOMAIN2_MASK (0x4000000U) macro
67947 … (((uint32_t)(((uint32_t)(x)) << SRC_M4RCR_DOMAIN2_SHIFT)) & SRC_M4RCR_DOMAIN2_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h67941 #define SRC_M4RCR_DOMAIN2_MASK (0x4000000U) macro
67947 … (((uint32_t)(((uint32_t)(x)) << SRC_M4RCR_DOMAIN2_SHIFT)) & SRC_M4RCR_DOMAIN2_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h67941 #define SRC_M4RCR_DOMAIN2_MASK (0x4000000U) macro
67947 … (((uint32_t)(((uint32_t)(x)) << SRC_M4RCR_DOMAIN2_SHIFT)) & SRC_M4RCR_DOMAIN2_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h67941 #define SRC_M4RCR_DOMAIN2_MASK (0x4000000U) macro
67947 … (((uint32_t)(((uint32_t)(x)) << SRC_M4RCR_DOMAIN2_SHIFT)) & SRC_M4RCR_DOMAIN2_MASK)
DMIMX8MM6_ca53.h67406 #define SRC_M4RCR_DOMAIN2_MASK (0x4000000U) macro
67412 … (((uint32_t)(((uint32_t)(x)) << SRC_M4RCR_DOMAIN2_SHIFT)) & SRC_M4RCR_DOMAIN2_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h67941 #define SRC_M4RCR_DOMAIN2_MASK (0x4000000U) macro
67947 … (((uint32_t)(((uint32_t)(x)) << SRC_M4RCR_DOMAIN2_SHIFT)) & SRC_M4RCR_DOMAIN2_MASK)
/hal_nxp-3.7.0/imx/devices/MCIMX7D/
DMCIMX7D_M4.h40687 #define SRC_M4RCR_DOMAIN2_MASK 0x4000000u macro