| /hal_nxp-3.7.0/s32/drivers/s32k3/Fls/include/ |
| D | Qspi_Ip_HwAccess.h | 104 BaseAddr->SPTRCLR |= QuadSPI_SPTRCLR_ABRT_CLR_MASK; in Qspi_Ip_ClearAhbBuf()
113 uint32 RegValue = (uint32)BaseAddr->SPTRCLR; in Qspi_Ip_GetClrAhbStatus()
127 BaseAddr->SPTRCLR = QuadSPI_SPTRCLR_IPPTRC_MASK; in Qspi_Ip_ClearIpSeqPointer()
137 BaseAddr->SPTRCLR = QuadSPI_SPTRCLR_BFPTRC_MASK; in Qspi_Ip_ClearAHBSeqPointer()
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| /hal_nxp-3.7.0/mcux/mcux-sdk/drivers/qspi/ |
| D | fsl_qspi.h | 628 base->SPTRCLR = (uint32_t)seq; in QSPI_ClearCommandSequence()
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| /hal_nxp-3.7.0/s32/drivers/s32k3/Fls/src/ |
| D | Qspi_Ip_Controller.c | 1990 …BaseAddr->SPTRCLR = (uint32)0x01000000UL | (uint32)QuadSPI_SPTRCLR_BFPTRC_MASK | (uint32)QuadSPI_… in Qspi_Ip_ResetAllRegisters()
2049 BaseAddr->SPTRCLR = (uint32)QuadSPI_SPTRCLR_BFPTRC_MASK | (uint32)QuadSPI_SPTRCLR_IPPTRC_MASK; in Qspi_Ip_ResetAllRegisters()
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| /hal_nxp-3.7.0/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K148_QUADSPI.h | 105 …__O uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offset: 0x1… member
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| /hal_nxp-3.7.0/s32/drivers/s32k3/BaseNXP/header/ |
| D | S32K344_QUADSPI.h | 111 …__O uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offset: 0x1… member
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| /hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_QUADSPI.h | 121 …__IO uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offset: 0x1… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK80F25615/ |
| D | MK80F25615.h | 18283 …__O uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offset: 0x1… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK82F25615/ |
| D | MK82F25615.h | 19256 …__O uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offset: 0x1… member
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| /hal_nxp-3.7.0/imx/devices/MCIMX6X/ |
| D | MCIMX6X_M4.h | 30441 …__IO uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offse… member
30487 #define QuadSPI_SPTRCLR_REG(base) ((base)->SPTRCLR)
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK27FA15/ |
| D | MK27FA15.h | 17785 …__O uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offset: 0x1… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK28FA15/ |
| D | MK28FA15.h | 17787 …__O uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offset: 0x1… member
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| /hal_nxp-3.7.0/imx/devices/MCIMX7D/ |
| D | MCIMX7D_M4.h | 37639 …__IO uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offse… member
37685 #define QuadSPI_SPTRCLR_REG(base) ((base)->SPTRCLR)
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U3/ |
| D | MCIMX7U3_cm4.h | 25126 …__O uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offset: 0x1… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U5/ |
| D | MCIMX7U5_cm4.h | 25127 …__O uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offset: 0x1… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ5/ |
| D | MIMX8MQ5_cm4.h | 44015 …__IO uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offset: 0x1… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ7/ |
| D | MIMX8MQ7_cm4.h | 46188 …__IO uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offset: 0x1… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MD7/ |
| D | MIMX8MD7_cm4.h | 46188 …__IO uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offset: 0x1… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MD6/ |
| D | MIMX8MD6_cm4.h | 46188 …__IO uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offset: 0x1… member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ6/ |
| D | MIMX8MQ6_cm4.h | 46188 …__IO uint32_t SPTRCLR; /**< Sequence Pointer Clear Register, offset: 0x1… member
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