Home
last modified time | relevance | path

Searched refs:SPI_RSER_EOQF_RE_MASK (Results 1 – 25 of 35) sorted by relevance

12

/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/dspi/
Dfsl_dspi.h63 … kDSPI_EndOfQueueInterruptEnable = SPI_RSER_EOQF_RE_MASK, /*!< EOQF interrupt enable.*/
68 …kDSPI_AllInterruptEnable = (int)(SPI_RSER_TCF_RE_MASK | SPI_RSER_EOQF_RE_MASK | SPI_RSER_TFUF_RE_M…
/hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_SPI.h499 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
502 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h9383 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
9389 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h9480 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
9486 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h9447 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
9453 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h10266 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
10272 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h10419 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
10425 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h11207 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
11213 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h11725 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
11731 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h11337 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
11343 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h11532 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
11538 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW24D5/
DMKW24D5.h7056 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
7058 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW22D5/
DMKW22D5.h7056 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
7058 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h12652 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
12658 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h13050 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
13056 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h17319 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
17325 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW31Z4/
DMKW31Z4.h6878 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
6880 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h21013 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
21019 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h22824 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
22830 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h22870 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
22876 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW40Z4/
DMKW40Z4.h7622 #define SPI_RSER_EOQF_RE_MASK 0x10000000u macro
7625 … (((uint32_t)(((uint32_t)(x))<<SPI_RSER_EOQF_RE_SHIFT))&SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW41Z4/
DMKW41Z4.h6878 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
6880 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW30Z4/
DMKW30Z4.h7622 #define SPI_RSER_EOQF_RE_MASK 0x10000000u macro
7625 … (((uint32_t)(((uint32_t)(x))<<SPI_RSER_EOQF_RE_SHIFT))&SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW21Z4/
DMKW21Z4.h6807 #define SPI_RSER_EOQF_RE_MASK (0x10000000U) macro
6809 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_EOQF_RE_SHIFT)) & SPI_RSER_EOQF_RE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW20Z4/
DMKW20Z4.h7622 #define SPI_RSER_EOQF_RE_MASK 0x10000000u macro
7625 … (((uint32_t)(((uint32_t)(x))<<SPI_RSER_EOQF_RE_SHIFT))&SPI_RSER_EOQF_RE_MASK)

12