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Searched refs:SIM_SCGC4_I2C0_MASK (Results 1 – 25 of 44) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h3776 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
3778 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKL17Z644/
DMKL17Z644.h7063 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
7069 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKL27Z644/
DMKL27Z644.h7072 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
7078 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h8535 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
8541 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h8601 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
8607 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h8575 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
8581 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h9356 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
9362 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h9543 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
9549 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h9868 #define SIM_SCGC4_I2C0_MASK (0x80U) macro
9874 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h10331 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
10337 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h10770 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
10776 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h10424 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
10430 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L2B31A/
DK32L2B31A.h11726 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
11732 …ine SIM_SCGC4_I2C0(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h10591 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
10597 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L2B21A/
DK32L2B21A.h11726 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
11732 …ine SIM_SCGC4_I2C0(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L2B11A/
DK32L2B11A.h11726 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
11732 …ine SIM_SCGC4_I2C0(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW24D5/
DMKW24D5.h6564 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
6566 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW22D5/
DMKW22D5.h6564 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
6566 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h11708 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
11714 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h12064 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
12070 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKM34ZA5/
DMKM34ZA5.h14569 #define SIM_SCGC4_I2C0_MASK (0x80U) macro
14575 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKM33ZA5/
DMKM33ZA5.h14573 #define SIM_SCGC4_I2C0_MASK (0x80U) macro
14579 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h16286 #define SIM_SCGC4_I2C0_MASK (0x40U) macro
16292 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKM35Z7/
DMKM35Z7.h16133 #define SIM_SCGC4_I2C0_MASK (0x80U) macro
16139 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKM34Z7/
DMKM34Z7.h16249 #define SIM_SCGC4_I2C0_MASK (0x80U) macro
16255 … SIM_SCGC4_I2C0(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_I2C0_SHIFT)) & SIM_SCGC4_I2C0_MASK)

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