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Searched refs:SDIO0FCLKDIV (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_clock.c881 pClkDiv = &CLKCTL0->SDIO0FCLKDIV; in CLOCK_GetSdioClkFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_clock.c881 pClkDiv = &CLKCTL0->SDIO0FCLKDIV; in CLOCK_GetSdioClkFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_clock.c895 pClkDiv = &CLKCTL0->SDIO0FCLKDIV; in CLOCK_GetSdioClkFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_clock.c895 pClkDiv = &CLKCTL0->SDIO0FCLKDIV; in CLOCK_GetSdioClkFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_clock.c895 pClkDiv = &CLKCTL0->SDIO0FCLKDIV; in CLOCK_GetSdioClkFreq()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h1281 __IO uint32_t SDIO0FCLKDIV; /**< SDIO0 FCLK divider, offset: 0x684 */ member
DMIMXRT685S_cm33.h6992 __IO uint32_t SDIO0FCLKDIV; /**< SDIO0 FCLK divider, offset: 0x684 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h6992 __IO uint32_t SDIO0FCLKDIV; /**< SDIO0 FCLK divider, offset: 0x684 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h1970 …__IO uint32_t SDIO0FCLKDIV; /**< SDIO0 Functional Clock Divider, offset: 0x68… member
DMIMXRT595S_cm33.h8208 …__IO uint32_t SDIO0FCLKDIV; /**< SDIO0 Functional Clock Divider, offset: 0x68… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h8204 …__IO uint32_t SDIO0FCLKDIV; /**< SDIO0 Functional Clock Divider, offset: 0x68… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h8207 …__IO uint32_t SDIO0FCLKDIV; /**< SDIO0 Functional Clock Divider, offset: 0x68… member