REG_LPSR_1P0_CLR (reference) in projects: hal_nxp-3.7.0

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/hal_nxp-3.7.0/imx/devices/MCIMX7D/
D	MCIMX7D_M4.h	`32332 …__IO uint32_t REG_LPSR_1P0_CLR; /**< Anadig 1.0V Low Power State Retention … member 32370 #define PMU_REG_LPSR_1P0_CLR_REG(base) ((base)->REG_LPSR_1P0_CLR)`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
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babblesim_ext_2G4_device_playback-3.7.0
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babblesim_ext_2G4_libPhyComv1-3.7.0
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babblesim_ext_2G4_modem_magic-3.7.0
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