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Searched refs:PSI5S1PCTL (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_GPR4_PCTL.h87 …__IO uint32_t PSI5S1PCTL; /**< PSI5_S_1 Clock Control Enable, offset: 0x38 … member
/hal_nxp-3.7.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c3849 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR4_PCTL->PSI5S1PCTL & GPR4_PCTL_PSI5S1PCTL_PCTL_MASK) >… in Clock_Ip_Get_PSI5S_1_CLK_Frequency()