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Searched refs:PROT_CTRL (Results 1 – 25 of 102) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/usdhc/
Dfsl_usdhc.h913 base->PROT_CTRL &= ~USDHC_PROT_CTRL_DMASEL_MASK; in USDHC_EnableInternalDMA()
1128 base->PROT_CTRL = ((base->PROT_CTRL & ~USDHC_PROT_CTRL_DTW_MASK) | USDHC_PROT_CTRL_DTW(width)); in USDHC_SetDataBusWidth()
1176 base->PROT_CTRL |= mask; in USDHC_EnableWakeupEvent()
1180 base->PROT_CTRL &= ~mask; in USDHC_EnableWakeupEvent()
1194 base->PROT_CTRL |= USDHC_PROT_CTRL_D3CD_MASK; in USDHC_CardDetectByData3()
1198 base->PROT_CTRL &= ~USDHC_PROT_CTRL_D3CD_MASK; in USDHC_CardDetectByData3()
1223 base->PROT_CTRL |= mask; in USDHC_EnableSdioControl()
1227 base->PROT_CTRL &= ~mask; in USDHC_EnableSdioControl()
1238 base->PROT_CTRL |= USDHC_PROT_CTRL_CREQ_MASK; in USDHC_SetContinueRequest()
1251 base->PROT_CTRL |= USDHC_PROT_CTRL_SABGREQ_MASK; in USDHC_RequestStopAtBlockGap()
[all …]
Dfsl_usdhc.c271 base->PROT_CTRL &= ~USDHC_PROT_CTRL_SABGREQ_MASK; in USDHC_SetTransferConfig()
273 base->PROT_CTRL |= USDHC_PROT_CTRL_CREQ_MASK; in USDHC_SetTransferConfig()
331 base->PROT_CTRL |= USDHC_PROT_CTRL_RD_DONE_NO_8CLK_MASK; in USDHC_SetTransferConfig()
854 proctl = base->PROT_CTRL; in USDHC_Init()
880 base->PROT_CTRL = proctl; in USDHC_Init()
1457 base->PROT_CTRL &= ~(USDHC_PROT_CTRL_DMASEL_MASK); in USDHC_SetInternalDmaConfig()
1458 base->PROT_CTRL |= USDHC_PROT_CTRL_DMASEL(dmaConfig->dmaMode); in USDHC_SetInternalDmaConfig()
1461 base->PROT_CTRL &= ~(USDHC_PROT_CTRL_DMASEL_MASK | USDHC_PROT_CTRL_BURST_LEN_EN_MASK); in USDHC_SetInternalDmaConfig()
1462 …base->PROT_CTRL |= USDHC_PROT_CTRL_DMASEL(dmaConfig->dmaMode) | USDHC_PROT_CTRL_BURST_LEN_EN(dmaCo… in USDHC_SetInternalDmaConfig()
1727 base->PROT_CTRL &= ~(USDHC_PROT_CTRL_DMASEL_MASK); in USDHC_SetScatterGatherAdmaTableConfig()
[all …]
/hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_USDHC.h83 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm0plus.h20465 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
DK32L3A60_cm4.h20415 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/imx/devices/MCIMX6X/
DMCIMX6X_M4.h40288 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
40332 #define uSDHC_PROT_CTRL_REG(base) ((base)->PROT_CTRL)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h31863 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
DMIMXRT685S_cm33.h42815 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/imx/devices/MCIMX7D/
DMCIMX7D_M4.h43897 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
43944 #define uSDHC_PROT_CTRL_REG(base) ((base)->PROT_CTRL)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h35856 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h35857 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h42815 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h47520 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h41963 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h41942 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h45024 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h44023 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h46415 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h48289 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h48434 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h56930 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h50609 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h54523 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h53254 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h53252 __IO uint32_t PROT_CTRL; /**< Protocol Control, offset: 0x28 */ member

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