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Searched refs:PORTC (Results 1 – 25 of 76) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/boards/twrke18f/
Dboard.h74 #define BOARD_LED_RED1_GPIO_PORT PORTC
77 #define BOARD_LED_GREEN1_GPIO_PORT PORTC
82 #define BOARD_LED_YELLOW_GPIO_PORT PORTC
89 #define BOARD_LED_ORANGE_GPIO_PORT PORTC
/hal_nxp-3.7.0/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW41Z4/
Dfsl_xcvr.c1881 PORTC->PCR[4] = (PORTC->PCR[4] & ~PORT_PCR_MUX_MASK) | PORT_PCR_MUX(2); in XCVR_CoexistenceInit()
1882 PORTC->PCR[3] = (PORTC->PCR[3] & ~PORT_PCR_MUX_MASK) | PORT_PCR_MUX(2); in XCVR_CoexistenceInit()
1885 PORTC->PCR[1] = (PORTC->PCR[1] & ~PORT_PCR_MUX_MASK) | PORT_PCR_MUX(2); in XCVR_CoexistenceInit()
1886 PORTC->PCR[3] = (PORTC->PCR[3] & ~PORT_PCR_MUX_MASK) | PORT_PCR_MUX(2); in XCVR_CoexistenceInit()
1913 PORTC->PCR[4] = (PORTC->PCR[4] & ~PORT_PCR_MUX_MASK) | PORT_PCR_MUX(2); in XCVR_CoexistenceInit()
1914 PORTC->PCR[1] = (PORTC->PCR[1] & ~PORT_PCR_MUX_MASK) | PORT_PCR_MUX(2); in XCVR_CoexistenceInit()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW22D5/
Dsystem_MKW22D5.c91PORTC->PCR[0] = (PORTC->PCR[0] & ~PORT_PCR_MUX_MASK) | PORT_PCR_MUX(0x01u); /* PORTC.0 as GPIO*/ in ExtClk_Setup_HookUp()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW24D5/
Dsystem_MKW24D5.c91PORTC->PCR[0] = (PORTC->PCR[0] & ~PORT_PCR_MUX_MASK) | PORT_PCR_MUX(0x01u); /* PORTC.0 as GPIO*/ in ExtClk_Setup_HookUp()
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/frdmk32l2b/
Dboard.h78 #define BOARD_SW3_PORT PORTC
137 #define ERPC_BOARD_SPI_INT_PORT PORTC
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/frdmk28fa/
Dboard.h81 #define SDCARD_CARD_WRITE_PROTECTION_GPIO_PORT PORTC
198 #define ERPC_BOARD_DSPI_INT_PORT PORTC
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/hvpkv11z75m/
Dboard.h44 #define BOARD_LED_RED_GPIO_PORT PORTC
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW40Z4/
DMKW40Z4.h5852 #define PORTC ((PORT_Type *)PORTC_BASE) macro
5853 #define PORTC_BASE_PTR (PORTC)
5857 #define PORT_BASE_PTRS { PORTA, PORTB, PORTC }
5945 #define PORTC_PCR0 PORT_PCR_REG(PORTC,0)
5946 #define PORTC_PCR1 PORT_PCR_REG(PORTC,1)
5947 #define PORTC_PCR2 PORT_PCR_REG(PORTC,2)
5948 #define PORTC_PCR3 PORT_PCR_REG(PORTC,3)
5949 #define PORTC_PCR4 PORT_PCR_REG(PORTC,4)
5950 #define PORTC_PCR5 PORT_PCR_REG(PORTC,5)
5951 #define PORTC_PCR6 PORT_PCR_REG(PORTC,6)
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW30Z4/
DMKW30Z4.h5852 #define PORTC ((PORT_Type *)PORTC_BASE) macro
5853 #define PORTC_BASE_PTR (PORTC)
5857 #define PORT_BASE_PTRS { PORTA, PORTB, PORTC }
5945 #define PORTC_PCR0 PORT_PCR_REG(PORTC,0)
5946 #define PORTC_PCR1 PORT_PCR_REG(PORTC,1)
5947 #define PORTC_PCR2 PORT_PCR_REG(PORTC,2)
5948 #define PORTC_PCR3 PORT_PCR_REG(PORTC,3)
5949 #define PORTC_PCR4 PORT_PCR_REG(PORTC,4)
5950 #define PORTC_PCR5 PORT_PCR_REG(PORTC,5)
5951 #define PORTC_PCR6 PORT_PCR_REG(PORTC,6)
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW20Z4/
DMKW20Z4.h5852 #define PORTC ((PORT_Type *)PORTC_BASE) macro
5853 #define PORTC_BASE_PTR (PORTC)
5857 #define PORT_BASE_PTRS { PORTA, PORTB, PORTC }
5945 #define PORTC_PCR0 PORT_PCR_REG(PORTC,0)
5946 #define PORTC_PCR1 PORT_PCR_REG(PORTC,1)
5947 #define PORTC_PCR2 PORT_PCR_REG(PORTC,2)
5948 #define PORTC_PCR3 PORT_PCR_REG(PORTC,3)
5949 #define PORTC_PCR4 PORT_PCR_REG(PORTC,4)
5950 #define PORTC_PCR5 PORT_PCR_REG(PORTC,5)
5951 #define PORTC_PCR6 PORT_PCR_REG(PORTC,6)
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/hal_nxp-3.7.0/s32/soc/s32z270/include/
DSiul2_Port_Ip_Defines.h110 #define PORTC ((Siul2_Port_Ip_PortType *)(SIUL2_1_MSCR_BASE + 0x10)) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/frdmk64f/
Dboard.h45 #define BOARD_SW2_PORT PORTC
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/frdmkl27z/
Dboard.h53 #define BOARD_SW3_PORT PORTC
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/frdmk22f/
Dboard.h70 #define BOARD_SW2_PORT PORTC
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/frdmk32l2a4s/
Dboard.h127 #define BOARD_LED_GREEN_GPIO_PORT PORTC
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/frdmk66f/
Dboard.h112 #define BOARD_LED_RED_GPIO_PORT PORTC
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h3206 #define PORTC ((PORT_Type *)PORTC_BASE) macro
3218 #define PORT_BASE_PTRS { PORTA, PORTB, PORTC, PORTD, PORTE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKL17Z644/
DMKL17Z644.h5952 #define PORTC ((PORT_Type *)PORTC_BASE) macro
5964 #define PORT_BASE_PTRS { PORTA, PORTB, PORTC, PORTD, PORTE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKL27Z644/
DMKL27Z644.h5961 #define PORTC ((PORT_Type *)PORTC_BASE) macro
5973 #define PORT_BASE_PTRS { PORTA, PORTB, PORTC, PORTD, PORTE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h7642 #define PORTC ((PORT_Type *)PORTC_BASE) macro
7654 #define PORT_BASE_PTRS { PORTA, PORTB, PORTC, PORTD, PORTE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h8423 #define PORTC ((PORT_Type *)PORTC_BASE) macro
8435 #define PORT_BASE_PTRS { PORTA, PORTB, PORTC, PORTD, PORTE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h7837 #define PORTC ((PORT_Type *)PORTC_BASE) macro
7849 #define PORT_BASE_PTRS { PORTA, PORTB, PORTC, PORTD, PORTE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h7832 #define PORTC ((PORT_Type *)PORTC_BASE) macro
7844 #define PORT_BASE_PTRS { PORTA, PORTB, PORTC, PORTD, PORTE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h8471 #define PORTC ((PORT_Type *)PORTC_BASE) macro
8483 #define PORT_BASE_PTRS { PORTA, PORTB, PORTC, PORTD, PORTE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h8420 #define PORTC ((PORT_Type *)PORTC_BASE) macro
8432 #define PORT_BASE_PTRS { PORTA, PORTB, PORTC, PORTD, PORTE }

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