| /hal_nxp-3.7.0/mcux/mcux-sdk/drivers/dspi/ |
| D | fsl_dspi.h | 675 return (uint32_t) & (base->POPR); in DSPI_GetRxRegisterAddress()
1033 return (base->POPR); in DSPI_ReadData()
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| D | fsl_dspi.c | 2019 dataReceived = base->POPR; in DSPI_SlaveTransferHandleIRQ()
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| /hal_nxp-3.7.0/s32/drivers/s32ze/Spi/src/ |
| D | Spi_Ip.c | 520 DmaTcdList[0u].Value = (uint32)&Base->POPR; /* src address read */ in Spi_Ip_RxDmaTcdSGInit()
788 DmaTcdList[0u].Value = (uint32)&Base->POPR; /* src address read */ in Spi_Ip_DmaConfig()
986 Data = Base->POPR; in Spi_Ip_ReadRxFifo()
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| /hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_SPI.h | 98 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| D | S32Z2_DSPI.h | 95 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV10Z7/ |
| D | MKV10Z7.h | 9021 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV30F12810/ |
| D | MKV30F12810.h | 9113 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK02F12810/ |
| D | MK02F12810.h | 9080 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F12810/ |
| D | MKV31F12810.h | 9899 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV10Z1287/ |
| D | MKV10Z1287.h | 10057 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW40Z4/ |
| D | MKW40Z4.h | 7363 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
7396 #define SPI_POPR_REG(base) ((base)->POPR)
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW30Z4/ |
| D | MKW30Z4.h | 7363 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
7396 #define SPI_POPR_REG(base) ((base)->POPR)
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW20Z4/ |
| D | MKW20Z4.h | 7363 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
7396 #define SPI_POPR_REG(base) ((base)->POPR)
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV11Z7/ |
| D | MKV11Z7.h | 10845 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F51212/ |
| D | MKV31F51212.h | 11358 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKV31F25612/ |
| D | MKV31F25612.h | 10970 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F12810/ |
| D | MK22F12810.h | 11165 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW24D5/ |
| D | MKW24D5.h | 6871 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW22D5/ |
| D | MKW22D5.h | 6871 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F25612/ |
| D | MK22F25612.h | 12285 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F51212/ |
| D | MK22F51212.h | 12683 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK22F12/ |
| D | MK22F12.h | 16952 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKW31Z4/ |
| D | MKW31Z4.h | 6693 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK24F12/ |
| D | MK24F12.h | 20573 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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| /hal_nxp-3.7.0/mcux/mcux-sdk/devices/MK63F12/ |
| D | MK63F12.h | 22384 __I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */ member
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